Towards routine backside SIMS sample preparation for efficient support of advanced IC process development

AIP Conference Proceedings

Volumn 1173, Issue , 2009, Pages 94-98

  Hopstaken, M J P ^a   Cabral Jr , C ^a   Pfeiffer, D ^a   Molella, C ^b   Ronsheim, P ^b  

^a IBM T J WATSON RESEARCH CENTER   (United States)

^b IBM   (United States)

Author keywords

Backside SIMS; Depth profiling; Depth resolution; Isotropic silicon etching; Sample preparation

Indexed keywords

EID: 70450242952     PISSN: 0094243X     EISSN: 15517616     Source Type: Conference Proceeding    
DOI: 10.1063/1.3251268     Document Type: Conference Paper

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