Stuck-open fault leakage and testing in nanometer technologies

Proceedings of the IEEE VLSI Test Symposium

Volumn , Issue , 2009, Pages 315-320

  Vazquez, Julio ^a   Champac, Victor ^a   Hawkins, Chuck ^b   Segura, Jaume ^c  

^a INSTITUTO NACIONAL DE ASTROFÍSICA   (Mexico)

^b UNIVERSITY OF NEW MEXICO   (United States)

^c UNIVERSITAT DE LES ILLES BALEARS   (Spain)

Author keywords

FinFET; Leakage current; Stuck open fault; Test

Indexed keywords

CMOS TECHNOLOGY; FAILURE MECHANISM; FINFET; GATE CURRENT; HIGH IMPEDANCE; MODERN TECHNOLOGIES; NANOMETER TECHNOLOGY; STUCK-OPEN FAULT; STUCK-OPEN FAULTS; TEST; TEST VECTORS;

CMOS INTEGRATED CIRCUITS; FIELD EFFECT TRANSISTORS; LEAKAGE CURRENTS; TECHNOLOGY; TESTING;

FAULT DETECTION;

EID: 70350787388     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/VTS.2009.33     Document Type: Conference Paper

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