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Volumn 48, Issue 6, 2001, Pages 1159-1164

Characterization and modeling of edge direct tunneling (EDT) leakage in ultrathin gate oxide MOSFETs

Author keywords

[No Author keywords available]

Indexed keywords

BAND STRUCTURE; ELECTRON TUNNELING; GATES (TRANSISTOR); POLYSILICON; SEMICONDUCTOR DEVICE MODELS; SEMICONDUCTOR DOPING;

EID: 0035367617     PISSN: 00189383     EISSN: None     Source Type: Journal    
DOI: 10.1109/16.925242     Document Type: Article
Times cited : (45)

References (17)
  • 12
    • 0033281247 scopus 로고    scopus 로고
    • A 0.18 um CMOS logic technology with dual gate oxide and low-k interconnect for high-performance and low-power applications
    • (1999) Symp. VLSI Technol. , pp. 11-12
    • Diaz, C.H.1


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.