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Volumn , Issue , 2001, Pages 1049-1058

Testing for resistive opens and stuck opens

Author keywords

[No Author keywords available]

Indexed keywords

COMPUTER SIMULATION; ELECTRIC FAULT CURRENTS; ELECTRIC POTENTIAL; MICROPROCESSOR CHIPS; RESISTORS;

EID: 0035684844     PISSN: 10893539     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper
Times cited : (125)

References (26)
  • 6
    • 0032307602 scopus 로고    scopus 로고
    • Analysis of pattern-dependent and timing dependent failure in an experimental test chip
    • Chang 98a
    • (1998) Proc. Int. Test Conf. , pp. 184-193
    • Chang, J.1
  • 17
    • 0007736338 scopus 로고    scopus 로고
  • 26
    • 0017961684 scopus 로고
    • Fault modeling and logic simulation of CMOS and MOS integrated circuits
    • Wadsack 78, May-June
    • (1978) Bell System Tech. J. , vol.57 , Issue.5 , pp. 1449-1488
    • Wadsack, R.L.1


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.