Design and implementation of a GALS adapter for ANoC based architectures

Proceedings - International Symposium on Asynchronous Circuits and Systems

Volumn , Issue , 2009, Pages 13-22

  Thonnart, Yvain ^a   Beigné, Edith ^a   Vivet, Pascal ^a  

^a CEA GRENOBLE   (France)

Author keywords

Asynchronous logic circuits; GALS architectures

Indexed keywords

CLOCKS; COMPUTER CIRCUITS; INTEGRATED CIRCUIT DESIGN; INTERNET PROTOCOLS; PROGRAMMABLE LOGIC CONTROLLERS; TIMING CIRCUITS;

65NM TECHNOLOGY; ASYNCHRONOUS LOGIC CIRCUITS; CLOCK GENERATOR; DESIGN AND IMPLEMENTATIONS; GLOBALLY ASYNCHRONOUS LOCALLY SYNCHRONOUS; GLOBALLY ASYNCHRONOUS LOCALLY SYNCHRONOUS ARCHITECTURE; INTEGRATION MODULES; NOC ARCHITECTURES; PROGRAMMABLE CLOCKS; SYNCHRONOUS SYSTEM;

NETWORK-ON-CHIP;

EID: 70349292542     PISSN: 26431394     EISSN: 26431483     Source Type: Conference Proceeding    
DOI: 10.1109/ASYNC.2009.13     Document Type: Conference Paper

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