A novel low-power full-adder cell for low voltage

Integration, the VLSI Journal

Volumn 42, Issue 4, 2009, Pages 457-467

  Navi, Keivan ^a   Maeen, Mehrdad ^a   Foroutan, Vahid ^a   Timarchi, Somayeh ^a   Kavehei, Omid ^b  

^a SHAHID BEHESHTI UNIVERSITY   (Iran)

^b UNIVERSITY OF ADELAIDE   (Australia)

Author keywords

Full adder; Low power; Majority function; MOSCAP; Performance analysis; Static CMOS inverter; Very large scale integrated (VLSI) circuit

Indexed keywords

FULL ADDER; LOW POWER; MAJORITY FUNCTION; MOSCAP; PERFORMANCE ANALYSIS; STATIC CMOS INVERTER; VERY LARGE-SCALE INTEGRATED (VLSI) CIRCUIT;

CELL MEMBRANES; ELECTRIC POTENTIAL; ENERGY EFFICIENCY; MOS CAPACITORS;

ADDERS;

EID: 68049112637     PISSN: 01679260     EISSN: None     Source Type: Journal    
DOI: 10.1016/j.vlsi.2009.02.001     Document Type: Article

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