760MHz G6 S/390 microprocessor exploiting multiple Vt and copper interconnects

Digest of Technical Papers - IEEE International Solid-State Circuits Conference

Volumn , Issue , 2000, Pages 96-97

  McPherson, T ^a   Averill, R ^a   Balazich, D ^a   Barkley, K ^a   Carey, S ^a   Chan, Y ^a   Chan, Y H ^a   Crea, R ^a   Dansky, A ^a   Dwyer, R ^a   Haen, A ^a   Hoffman, D ^a   Jatkowski, A ^a   Mayo, M ^a   Merrill, D ^a   McNamara, T ^a   Northrop, G ^a   Rawlins, J ^a   Sigal, L ^a   Slegel, T ^a   Webber, D ^a   Williams, P ^a   Yee, F ^a   more..

^a IBM   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

CACHE MEMORY; CAPACITANCE; CMOS INTEGRATED CIRCUITS; COPPER; CRITICAL PATH ANALYSIS; ELECTRIC WIRE; POWER INTEGRATED CIRCUITS; SERVERS; SWITCHING CIRCUITS; TRANSISTORS;

COPPER INTERCONNECTS; MULTIPLE CHIP MODULES (MCM);

MICROPROCESSOR CHIPS;

EID: 0034428353     PISSN: 01936530     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (4)

1. 600 MHz G5 S/390 microprocessor
2. Storage hierarchy to support a 600Mhz G5 S/390 microprocessor
3. IBM S/390 G5 microprocessor
4. Deep submicron design techniques for 500MHz IBM S/390 G5 custom microprocessor