Low-Power CMOS Digital Design with Dual Embedded Adaptive Power Supplies

IEEE Journal of Solid-State Circuits

Volumn 35, Issue 4, 2000, Pages 652-655

  Kuroda, Tadahiro ^a   Hamada, Mototsugu ^a  

^a TOSHIBA CORPORATION   (Japan)

Author keywords

Adaptive power supply system; Clustered voltage scaling; Low power CMOS design; Multiple supply voltages

Indexed keywords

EID: 0000700070     PISSN: 00189200     EISSN: None     Source Type: Journal    
DOI: 10.1109/4.839927     Document Type: Article

References (6)

1. K. Usami and M. Horowitz, "Clustered voltage scaling technique for low-power design," in Proc. ISLPD'95, Apr. 1995, pp. 3-8.
2. V. Gutnik and A. Chandrakasan, "An efficient controller for variable supply-voltage low power processing," in Symp. VLSI Circuits Dig. Tech. Papers, June 1996, pp. 158-159.
3. T. Kuroda, K. Suzuki, S. Mita, T. Fujita, F. Yamane, F. Sano, A. Chiba, Y. Watanabe, K. Matsuda, T. Maeda, T. Sakurai, and T. Furuyama, "Variable-supply voltage scheme for low-power high-speed CMOS digital design," IEEE J. Solid-State Circuits, vol. 33, pp. 454-462, Mar. 1998.
4. M. Takahashi, M. Hamada, T. Nishikawa, H. Arakida, T. Fujita, F. Hatori, S. Mita, K. Suzuki, A. Chiba, T. Terasawa, F. Sano, Y. Watanabe, K. Usami, M. Igarashi, T. Ishikawa, M. Kanazawa, T. Kuroda, and T. Furuyama, "A 60-mW MPEG4 video codec using clustered voltage scaling with variable supply-voltage scheme," IEEE J. Solid-State Circuits, vol. 33, pp. 1772-1779, Nov. 1998.
5. K. Usami, M. Igarashi, T. Ishikawa, M. Kanazawa, M. Takahashi, M. Hamada, H. Arakida, T. Terazawa, and T. Kuroda, "Design methodology of ultra low-power MPEG4 codec core exploiting voltage scaling techniques," in Proc., DAC'98, June 1998, pp. 483-488.
6. 2 2-D discrete cosine transform core processor with variable-threshold- voltage scheme," IEEE J. Solid-State Circuits, vol. 31, pp. 1770-1779, Nov. 1996.