-
1
-
-
0032492884
-
Room- temperaturetransistor based on a single carbon nanotube
-
May
-
S. J. Tans, A. R. M. Verschueren, and C. Dekker, "Room- temperaturetransistor based on a single carbon nanotube," Nature, vol. 393, no. 6680, pp. 49-52, May 1998.
-
(1998)
Nature
, vol.393
, Issue.6680
, pp. 49-52
-
-
Tans, S.J.1
Verschueren, A.R.M.2
Dekker, C.3
-
2
-
-
0042991275
-
Ballistic carbonnanotube field-effect transistors
-
Aug
-
A. Javey, J. Guo, Q. Wang, M. Lundstrom, and H. Dai, "Ballistic carbonnanotube field-effect transistors," Nature, vol. 424, no. 6949, pp. 654-657, Aug. 2003.
-
(2003)
Nature
, vol.424
, Issue.6949
, pp. 654-657
-
-
Javey, A.1
Guo, J.2
Wang, Q.3
Lundstrom, M.4
Dai, H.5
-
3
-
-
0036974829
-
High dielectrics for advanced carbon-nanotube transistors and logic gates
-
Dec
-
A. Javey, H. Kim, M. Brink, Q. Wang, A. Ural, J. Guo, P. McIntyre, P. McEuen, M. Lundstrom, and H. Dai, "High dielectrics for advanced carbon-nanotube transistors and logic gates," Nat. Mater., vol. 1, no. 4, pp. 241-246, Dec. 2002.
-
(2002)
Nat. Mater
, vol.1
, Issue.4
, pp. 241-246
-
-
Javey, A.1
Kim, H.2
Brink, M.3
Wang, Q.4
Ural, A.5
Guo, J.6
McIntyre, P.7
McEuen, P.8
Lundstrom, M.9
Dai, H.10
-
4
-
-
79956022434
-
Vertical scaling of carbon nanotube field-effect transistors using top gate electrodes
-
May
-
S. J. Wind, J. Appenzeller, R. Martel, V. Derycke, and P. Avouris, "Vertical scaling of carbon nanotube field-effect transistors using top gate electrodes," Appl. Phys. Lett., vol. 80, no. 20, pp. 3817-3819, May 2002.
-
(2002)
Appl. Phys. Lett
, vol.80
, Issue.20
, pp. 3817-3819
-
-
Wind, S.J.1
Appenzeller, J.2
Martel, R.3
Derycke, V.4
Avouris, P.5
-
6
-
-
0034229036
-
Analysis of off-leakage currents and impact on off-state power consumption for CMOS technology in the 100-nm regime
-
Jul
-
W. K. Henson, N. Yang, S. Kubicek, E. M. Vogel, J. J. Wortman, K. De Meyer, and A. Naem, "Analysis of off-leakage currents and impact on off-state power consumption for CMOS technology in the 100-nm regime," IEEE Trans. Electron Devices, vol. 47, no. 7, pp. 1393-1400, Jul. 2000.
-
(2000)
IEEE Trans. Electron Devices
, vol.47
, Issue.7
, pp. 1393-1400
-
-
Henson, W.K.1
Yang, N.2
Kubicek, S.3
Vogel, E.M.4
Wortman, J.J.5
De Meyer, K.6
Naem, A.7
-
7
-
-
0032026488
-
Transistor operation of 30 nm gate-length EJ-MOSFETs
-
Mar
-
H. Kawaura, T. Sakamoto, T. Baba, Y. Ochiai, J. Fujita, S. Matsui, and J. Sone, "Transistor operation of 30 nm gate-length EJ-MOSFETs," IEEE Electron Device Lett., vol. 19, no. 3, pp. 74-76, Mar. 1998.
-
(1998)
IEEE Electron Device Lett
, vol.19
, Issue.3
, pp. 74-76
-
-
Kawaura, H.1
Sakamoto, T.2
Baba, T.3
Ochiai, Y.4
Fujita, J.5
Matsui, S.6
Sone, J.7
-
8
-
-
0033884610
-
Transistor characteristics of 14-nm-gate-length EJ-MOSFETs
-
Apr
-
H. Kawaura, T. Sakamoto, T. Baba, Y. Ochiai, J. Fujita, and J. Sone, "Transistor characteristics of 14-nm-gate-length EJ-MOSFETs," IEEE Trans. Electron Devices, vol. 47, no. 4, pp. 856-860, Apr. 2000.
-
(2000)
IEEE Trans. Electron Devices
, vol.47
, Issue.4
, pp. 856-860
-
-
Kawaura, H.1
Sakamoto, T.2
Baba, T.3
Ochiai, Y.4
Fujita, J.5
Sone, J.6
-
9
-
-
0035444559
-
50 nm MOSFET with electrically induced source/drain (S/D) extensions
-
Sep
-
S. Han, S. Chang, J. Lee, and H. Shin, "50 nm MOSFET with electrically induced source/drain (S/D) extensions," IEEE Trans. Electron Devices, vol. 48, no. 9, pp. 2058-2064, Sep. 2001.
-
(2001)
IEEE Trans. Electron Devices
, vol.48
, Issue.9
, pp. 2058-2064
-
-
Han, S.1
Chang, S.2
Lee, J.3
Shin, H.4
-
10
-
-
0036772966
-
A new 50-nm nMOSFET with side-gates for virtual source-drain extensions
-
Oct
-
Y. J. Choi, B. Y. Choi, K. R. Kim, J. D. Lee, and B. G. Park, "A new 50-nm nMOSFET with side-gates for virtual source-drain extensions," IEEE Trans. Electron Devices, vol. 49, no. 10, pp. 1833-1835, Oct. 2002.
-
(2002)
IEEE Trans. Electron Devices
, vol.49
, Issue.10
, pp. 1833-1835
-
-
Choi, Y.J.1
Choi, B.Y.2
Kim, K.R.3
Lee, J.D.4
Park, B.G.5
-
11
-
-
41749122053
-
A novel dynamic threshold operation using electrically induced junction MOSFET in the deep sub-micrometer CMOS regime
-
A. Dixit and V. R. Rao, "A novel dynamic threshold operation using electrically induced junction MOSFET in the deep sub-micrometer CMOS regime," in Proc. 16th Int. Conf. VLSI Des., 2003, pp. 499-503.
-
(2003)
Proc. 16th Int. Conf. VLSI Des
, pp. 499-503
-
-
Dixit, A.1
Rao, V.R.2
-
12
-
-
33646050063
-
Nanoscale SOI MOSFETs with electrically induced source/drain extension: Novel attributes and design considerations for suppressed short-channel effects
-
May
-
A. A. Orouji and M. J. Kumar, "Nanoscale SOI MOSFETs with electrically induced source/drain extension: Novel attributes and design considerations for suppressed short-channel effects," Superlattices Microstruct., vol. 39, no. 5, pp. 395-405, May 2006.
-
(2006)
Superlattices Microstruct
, vol.39
, Issue.5
, pp. 395-405
-
-
Orouji, A.A.1
Kumar, M.J.2
-
13
-
-
33244497143
-
A new symmetrical double gate nanoscale MOSFET with asymmetrical side gates for electrically induced source/drain
-
Mar
-
A. A. Orouji and M. J. Kumar, "A new symmetrical double gate nanoscale MOSFET with asymmetrical side gates for electrically induced source/drain," Microelectron. Eng., vol. 83, no. 3, pp. 409-414, Mar. 2006.
-
(2006)
Microelectron. Eng
, vol.83
, Issue.3
, pp. 409-414
-
-
Orouji, A.A.1
Kumar, M.J.2
-
14
-
-
29344473782
-
Shielded channel double-gate MOSFET: A novel device for reliable nanoscale CMOS applications
-
Sep
-
A. A. Orouji and M. J. Kumar, "Shielded channel double-gate MOSFET: A novel device for reliable nanoscale CMOS applications," IEEE Trans. Device Mater. Rel., vol. 5, no. 3, pp. 509-514, Sep. 2005.
-
(2005)
IEEE Trans. Device Mater. Rel
, vol.5
, Issue.3
, pp. 509-514
-
-
Orouji, A.A.1
Kumar, M.J.2
-
15
-
-
23944447436
-
Two-dimensional analytical threshold voltage model of nanoscale fully depleted SOI MOSFET with electrically induced source/drain extensions
-
Jul
-
M. J. Kumar and A. A. Orouji, "Two-dimensional analytical threshold voltage model of nanoscale fully depleted SOI MOSFET with electrically induced source/drain extensions," IEEE Trans. Electron Devices, vol. 52, no. 7, pp. 1568-1575, Jul. 2005.
-
(2005)
IEEE Trans. Electron Devices
, vol.52
, Issue.7
, pp. 1568-1575
-
-
Kumar, M.J.1
Orouji, A.A.2
-
16
-
-
26244453976
-
Towards multiscale modeling of carbon nanotube transistors
-
J. Guo, S. Datta, M. Lundstrom, and M. P. Anantram, "Towards multiscale modeling of carbon nanotube transistors," Int. J. Multiscale Comput. Eng., vol. 2, pp. 257-276, 2004.
-
(2004)
Int. J. Multiscale Comput. Eng
, vol.2
, pp. 257-276
-
-
Guo, J.1
Datta, S.2
Lundstrom, M.3
Anantram, M.P.4
-
17
-
-
29144445274
-
-
S. O. Koswatta, M. S. Lundstrom, M. P. Anantram, and D. E. Nikonov, Simulation of phonon-assisted band-to-band tunneling in carbon nanotube field-effect transistors, Appl. Phys. Lett., 87, no. 25, pp. 253 107-253 109, Dec. 2005.
-
S. O. Koswatta, M. S. Lundstrom, M. P. Anantram, and D. E. Nikonov, "Simulation of phonon-assisted band-to-band tunneling in carbon nanotube field-effect transistors," Appl. Phys. Lett., vol. 87, no. 25, pp. 253 107-253 109, Dec. 2005.
-
-
-
-
18
-
-
50249086884
-
Investigation of the novel attributes of a carbon nanotube FET with high-κ gate dielectrics
-
Sep
-
Z. Arefinia and A. A. Orouji, "Investigation of the novel attributes of a carbon nanotube FET with high-κ gate dielectrics," Phys. E - Low-Dimensional Syst. Nanostructures, vol. 40, no. 10, pp. 3068-3071, Sep. 2008.
-
(2008)
Phys. E - Low-Dimensional Syst. Nanostructures
, vol.40
, Issue.10
, pp. 3068-3071
-
-
Arefinia, Z.1
Orouji, A.A.2
-
19
-
-
57849114728
-
Novel attributes in scaling issues of carbon nanotube field-effect transistors
-
Jan
-
Z. Arefinia and A. A. Orouji, "Novel attributes in scaling issues of carbon nanotube field-effect transistors," Microelectron. J., vol. 40, no. 1, pp. 5-9, Jan. 2009.
-
(2009)
Microelectron. J
, vol.40
, Issue.1
, pp. 5-9
-
-
Arefinia, Z.1
Orouji, A.A.2
-
21
-
-
0034291813
-
Nanoscale device modeling: Green's function method
-
Oct
-
S. Datta, "Nanoscale device modeling: Green's function method," Superlattices Microstruct., vol. 28, no. 4, pp. 253-278, Oct. 2000.
-
(2000)
Superlattices Microstruct
, vol.28
, Issue.4
, pp. 253-278
-
-
Datta, S.1
-
22
-
-
0003433701
-
-
London, U.K, Imperial College Press
-
R. Saito, G. Dresselhaus, and M. S. Dresselhaus, Physical Property of Carbon Nanotubes. London, U.K.: Imperial College Press, 1998.
-
(1998)
Physical Property of Carbon Nanotubes
-
-
Saito, R.1
Dresselhaus, G.2
Dresselhaus, M.S.3
-
24
-
-
0001597428
-
Schottky barrier height and the continuum gap states
-
Feb
-
J. Tersoff, "Schottky barrier height and the continuum gap states," Phys. Rev. Lett., vol. 52, no. 6, pp. 465-468, Feb. 1984.
-
(1984)
Phys. Rev. Lett
, vol.52
, Issue.6
, pp. 465-468
-
-
Tersoff, J.1
-
25
-
-
11744386427
-
Reference levels for heterojunctions and Schottky barriers
-
Feb
-
J. Tersoff, "Reference levels for heterojunctions and Schottky barriers," Phys. Rev. Lett., vol. 56, no. 6, p. 675, Feb. 1986.
-
(1986)
Phys. Rev. Lett
, vol.56
, Issue.6
, pp. 675
-
-
Tersoff, J.1
-
26
-
-
0342723158
-
Single and multi-band modeling of quantum electron transport through layered semiconductor devices
-
Jun
-
R. Lake, G. Klimeck, R. C. Bowen, and D. Jovanovic, "Single and multi-band modeling of quantum electron transport through layered semiconductor devices," J. Appl. Phys., vol. 81, no. 12, pp. 7845-7869, Jun. 1997.
-
(1997)
J. Appl. Phys
, vol.81
, Issue.12
, pp. 7845-7869
-
-
Lake, R.1
Klimeck, G.2
Bowen, R.C.3
Jovanovic, D.4
-
27
-
-
33845426952
-
Two dimensional quantum mechanical modeling of nanotransistors
-
Feb
-
A. Svizhenko, M. P. Anantram, T. R. Govindam, and B. Biegel, "Two dimensional quantum mechanical modeling of nanotransistors," J. Appl. Phys., vol. 91, no. 4, pp. 2343-2354, Feb. 2002.
-
(2002)
J. Appl. Phys
, vol.91
, Issue.4
, pp. 2343-2354
-
-
Svizhenko, A.1
Anantram, M.P.2
Govindam, T.R.3
Biegel, B.4
-
28
-
-
0021401123
-
Structure-enhanced MOSFET degradation due to hot electron injection
-
Mar
-
F. Hsu and H. Grinolds, "Structure-enhanced MOSFET degradation due to hot electron injection," IEEE Electron Device Lett., vol. EDL-5, no. 3, pp. 71-74, Mar. 1984.
-
(1984)
IEEE Electron Device Lett
, vol.EDL-5
, Issue.3
, pp. 71-74
-
-
Hsu, F.1
Grinolds, H.2
-
29
-
-
0018457253
-
1 μm MOSFET VLSI technology Part IV: Hot-electron design constraints
-
Apr
-
T. H. Ning, P. W. Cook, R. H. Dennard, C. M. Osburn, S. E. Schuster, and H. N. Yu, "1 μm MOSFET VLSI technology Part IV: Hot-electron design constraints," IEEE Trans. Electron Devices, vol. ED-26, no. 4, pp. 346-353, Apr. 1979.
-
(1979)
IEEE Trans. Electron Devices
, vol.ED-26
, Issue.4
, pp. 346-353
-
-
Ning, T.H.1
Cook, P.W.2
Dennard, R.H.3
Osburn, C.M.4
Schuster, S.E.5
Yu, H.N.6
-
32
-
-
8744318597
-
Subband decomposition approach for the simulation of quantum electron transport in nanostructures
-
Jan
-
E. Polizzi and N. B. Abdallah, "Subband decomposition approach for the simulation of quantum electron transport in nanostructures," J. Comput. Phys., vol. 202, no. 1, pp. 150-180, Jan. 2005.
-
(2005)
J. Comput. Phys
, vol.202
, Issue.1
, pp. 150-180
-
-
Polizzi, E.1
Abdallah, N.B.2
|