A new symmetrical double gate nanoscale MOSFET with asymmetrical side gates for electrically induced source/drain

Microelectronic Engineering

Volumn 83, Issue 3, 2006, Pages 409-414

  Orouji, Ali A ^a   Kumar, M Jagadesh ^b  

^a SEMNAN UNIVERSITY   (Iran)

^b INDIAN INSTITUTE OF TECHNOLOGY DELHI   (India)

Author keywords

Induced source drain; MOSFET; Short channel effects; Threshold voltage; Two dimensional simulation

Indexed keywords

COMPUTER SIMULATION; GATES (TRANSISTOR); NANOSTRUCTURED MATERIALS; SILICON ON INSULATOR TECHNOLOGY; THRESHOLD VOLTAGE;

GATE BIAS VARIATION; INDUCED SOURCE/DRAIN; SHORT-CHANNEL EFFECTS; TWO-DIMENSIONAL SIMULATION;

MOSFET DEVICES;

EID: 33244497143     PISSN: 01679317     EISSN: None     Source Type: Journal    
DOI: 10.1016/j.mee.2005.11.002     Document Type: Article

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