IDEA and AES, two cryptographic algorithms implemented using partial and dynamic reconfiguration

Microelectronics Journal

Volumn 40, Issue 6, 2009, Pages 1032-1040

  Granado, José M ^a   Vega Rodríguez, Miguel A ^a   Sánchez Pérez, Juan M ^a   Gómez Pulido, Juan A ^a  

^a UNIVERSITY OF EXTREMADURA   (Spain)

Author keywords

AES; Cryptography; FPGA; Handel C; IDEA; VHDL

Indexed keywords

AES; FPGA; HANDEL-C; IDEA; VHDL;

ALGORITHMS; DYNAMIC MODELS; FIELD PROGRAMMABLE GATE ARRAYS (FPGA);

CRYPTOGRAPHY;

EID: 67349173542     PISSN: 00262692     EISSN: None     Source Type: Journal    
DOI: 10.1016/j.mejo.2008.11.044     Document Type: Article

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