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Volumn 2779, Issue , 2003, Pages 334-350

Efficient implementation of rijndael encryption in reconfigurable hardware: Improvements and design tradeoffs

Author keywords

[No Author keywords available]

Indexed keywords

ALGORITHMS; COMMERCE; COMPUTER HARDWARE; DATA PRIVACY; DESIGN; EFFICIENCY; EMBEDDED SYSTEMS; HARDWARE; OPTIMIZATION; RECONFIGURABLE HARDWARE;

EID: 35248847435     PISSN: 03029743     EISSN: 16113349     Source Type: Book Series    
DOI: None     Document Type: Article
Times cited : (123)

References (21)
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    • A.J. Elbirt et Al, An FPGA Implementation and Performance Evaluation of the AES Block Cipher Candidate Algorithm Finalists, The Third Advanced Encryption Standard (AES3) Candidate Conference, April 13-14 2000, New York, USA.
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    • Elbirt, A.J.1
  • 4
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    • Comparison of the Hardware Performance of the AES Candidates using Reconfigurable Hardware
    • April 13-14 New York, USA
    • K. Gaj and P. Chodowiec, Comparison of the Hardware Performance of the AES Candidates using Reconfigurable Hardware, The Third Advanced Encryption Standard (AES3) Candidate Conference, April 13-14 2000, New York, USA.
    • (2000) The Third Advanced Encryption Standard (AES3) Candidate Conference
    • Gaj, K.1    Chodowiec, P.2
  • 5
    • 84947234902 scopus 로고    scopus 로고
    • Experimental Testing of the Gigabit IPSec-Compliant Implementations of Rijndael and Triple-DES Using SLAAC-1V FPGA Accelerator Board
    • proceedings of ISC 2001: Information Security Workshop, Springer-Verlag
    • P. Chodowiec et al, Experimental Testing of the Gigabit IPSec-Compliant Implementations of Rijndael and Triple-DES Using SLAAC-1V FPGA Accelerator Board, in the proceedings of ISC 2001: Information Security Workshop, LNCS 2200, pp. 220-234, Springer-Verlag.
    • LNCS , vol.2200 , pp. 220-234
    • Chodowiec, P.1
  • 9
    • 84944878412 scopus 로고    scopus 로고
    • High Performance Single Ship FPGA Rijndael Algorithm Implementations
    • proceedings of CHES 2001: The Third International CHES Workshop, Springer-Verlag
    • M. McLoone and J.V. McCanny, High Performance Single Ship FPGA Rijndael Algorithm Implementations, in the proceedings of CHES 2001: The Third International CHES Workshop, Lecture Notes In Computer Science, LNCS 2162, pp 65-76, Springer-Verlag.
    • Lecture Notes in Computer Science, LNCS , vol.2162 , pp. 65-76
    • McLoone, M.1    McCanny, J.V.2
  • 11
    • 84944872607 scopus 로고    scopus 로고
    • Two Methods of Rijndael Implementation in Reconfigurable Hardware
    • proceedings of CHES 2001: The Third International CHES Workshop, Springer-Verlag
    • V. Fischer and M. Drutarovsky, Two Methods of Rijndael Implementation in Reconfigurable Hardware, in the proceedings of CHES 2001: The Third International CHES Workshop, Lecture Notes In Computer Science, LNCS 2162, pp 65-76, Springer-Verlag.
    • Lecture Notes in Computer Science, LNCS , vol.2162 , pp. 65-76
    • Fischer, V.1    Drutarovsky, M.2
  • 14
    • 0036933530 scopus 로고    scopus 로고
    • Architecutre and VLSI Implementations of the AES-Proposal Rijndael
    • December
    • N. Sklavos, O. Koufopavlou, Architecutre and VLSI Implementations of the AES-Proposal Rijndael, in IEEE Transactions on Computers, Volume 51, Number 12, pp 1454-1459, December 2002.
    • (2002) IEEE Transactions on Computers , vol.51 , Issue.12 , pp. 1454-1459
    • Sklavos, N.1    Koufopavlou, O.2
  • 15
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    • Compact Hardware Architecture for 188-bit Block Cipher Camellia
    • november 6-7, Munich, Germany
    • A. Satoh et al, Compact Hardware Architecture for 188-bit Block Cipher Camellia, in the Proceedings of the Third NESSIE Workshop, november 6-7, 2002, Munich, Germany.
    • (2002) Proceedings of the Third NESSIE Workshop
    • Satoh, A.1
  • 17
    • 33845592352 scopus 로고    scopus 로고
    • Implementation approaches for the advanced encryption standard algorithm
    • Fourth Quarter
    • Xinmiao Zhang, Parhi K.K., Implementation approaches for the advanced encryption standard algorithm, in IEEE Circuits and Systems Magazine, pp 24-46, Fourth Quarter 2002.
    • (2002) IEEE Circuits and Systems Magazine , pp. 24-46
    • Zhang, X.1    Parhi, K.K.2
  • 19
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    • Efficient Rijndael Encryption Implementation with Composite Field Arithmetic
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    • A. Rudra et al, Efficient Rijndael Encryption Implementation with Composite Field Arithmetic, in the proceedings of CHES 2001: The Third International CHES Workshop, Lecture Notes In Computer Science, LNCS2162, pp 65-76, Springer-Verlag.
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  • 20
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  • 21
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    • An ASIC Implementation of the AES SBoxes
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* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.