A fully pipelined memoryless 17.8 Gbps AES-128 encryptor

ACM/SIGDA International Symposium on Field Programmable Gate Arrays - FPGA

Volumn , Issue , 2003, Pages 207-215

  Järvinen, Kimmo U ^a   Tommiska, Matti T ^a   Skyttä, Jorma O ^a  

^a AALTO UNIVERSITY   (Finland)

Author keywords

Advanced encryption standard (AES); FPGA; Pipelining

Indexed keywords

ALGORITHMS; APPLICATION SPECIFIC INTEGRATED CIRCUITS; DIGITAL ARITHMETIC; EMBEDDED SYSTEMS; FIELD PROGRAMMABLE GATE ARRAYS; LOGIC DESIGN; PIPELINE PROCESSING SYSTEMS; TABLE LOOKUP;

DIGITAL ENCRYPTION STANDARD; EMBEDDED SYSTEM BLOCKS; ENCRYPTOR; LOGIC STRUCTURES;

CRYPTOGRAPHY;

EID: 0037673240     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1145/611847.611848     Document Type: Conference Paper

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