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Volumn , Issue , 2008, Pages

Evaluating the effectiveness of physically-aware N-Detect test using real silicon

Author keywords

[No Author keywords available]

Indexed keywords

CHARACTERISTICS OF DEFECT; DELAY TESTS; DETECTION CHARACTERISTICS; INDUSTRIAL DESIGN; LOGIC BIST; LSI CHIPS;

EID: 67249104877     PISSN: 10893539     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/TEST.2008.4700606     Document Type: Conference Paper
Times cited : (13)

References (23)
  • 2
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    • An Experimental chip to evaluate test techniques experiment results
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    • S. C. Ma, P. Franco, and E. J. McCluskey, "An Experimental Chip to Evaluate Test Techniques Experiment Results," Proc. International Test Conference, pp. 663-672, Oct. 1995.
    • (1995) Proc. International Test Conference , pp. 663-672
    • Ma, S.C.1    Franco, P.2    McCluskey, E.J.3
  • 7
    • 8744236029 scopus 로고    scopus 로고
    • A Measure of quality for N-Detection test sets
    • Nov.
    • I. Pomeranz and S. M. Reddy, "A Measure of Quality for N-Detection Test Sets," IEEE Transactions on Computers, vol.53, pp. 1497-1503, Nov. 2004.
    • (2004) IEEE Transactions on Computers , vol.53 , pp. 1497-1503
    • Pomeranz, I.1    Reddy, S.M.2
  • 15
    • 39749191381 scopus 로고    scopus 로고
    • Achieving serendipitous N-detect mark-Offs in multi-capture-clock scan patterns
    • Oct.
    • G. Bhargava, D. Meehl, and J. Sage, "Achieving Serendipitous N-detect Mark-Offs in Multi-Capture-Clock Scan Patterns," Proc. International Test Conference, Oct. 2007.
    • (2007) Proc. International Test Conference
    • Bhargava, G.1    Meehl, D.2    Sage, J.3
  • 19
    • 0041633641 scopus 로고    scopus 로고
    • Test generation for designs with multiple clocks
    • June
    • X. Lin and R. Thompson, "Test Generation for Designs with Multiple Clocks," Proc. Design Automation Conference, pp. 662-667, June 2003.
    • (2003) Proc. Design Automation Conference , pp. 662-667
    • Lin, X.1    Thompson, R.2
  • 20
    • 0036443109 scopus 로고    scopus 로고
    • Scan test data volume reduction in multi-clocked designs with safe capture technique
    • Oct.
    • V. Jain and J. Waicukauski, "Scan Test Data Volume Reduction in Multi-Clocked Designs with Safe Capture Technique," Proc. International Test Conference, pp. 148-153, Oct. 2002.
    • (2002) Proc. International Test Conference , pp. 148-153
    • Jain, V.1    Waicukauski, J.2
  • 21
    • 39749170502 scopus 로고    scopus 로고
    • A Logic diagnosis methodology for improved localization and extraction of accurate defect behavior
    • Oct.
    • R. Desineni, O. Poku, and R. D. Blanton, "A Logic Diagnosis Methodology for Improved Localization and Extraction of Accurate Defect Behavior," Proc. International Test Conference, Oct. 2006.
    • (2006) Proc. International Test Conference
    • Desineni, R.1    Poku, O.2    Blanton, R.D.3


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.