3D architecture modeling and exploration

2007 Proceedings - 24th International VLSI Multilevel Interconnection Conference, VMIC 2007

Volumn , Issue , 2007, Pages 231-238

  Cong, Jason ^a,b   Kursun, Eren ^a   Liu, Yongxiang ^a   Ma, Yuchun ^c   Reinman, Glenn ^a  

^a UNIVERSITY OF CALIFORNIA   (United States)

^b CALIFORNIA NANOSYSTEMS INSTITUTE   (United States)

^c TSINGHUA UNIVERSITY   (China)

Author keywords

[No Author keywords available]

Indexed keywords

3D ARCHITECTURES; EXPLORATION TOOLS; FLEXIBLE BLOCKS; LATENCY OPTIMIZATIONS; MULTI-LAYER ARCHITECTURES; ON-CHIP TEMPERATURE; PHYSICAL DESIGN; VERTICAL INTEGRATION;

INTEGRATION; THREE DIMENSIONAL; WIRE;

ARCHITECTURAL DESIGN;

EID: 61649099723     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

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