Multiple layers of silicon-on-insulator islands fabrication by selective epitaxial growth

IEEE Electron Device Letters

Volumn 20, Issue 5, 1999, Pages 194-196

  Pae, Sangwoo ^a   Su, Taichi ^a   Denton, John P ^a   Neudeck, Gerold W ^a  

^a PURDUE UNIVERSITY   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

CMOS INTEGRATED CIRCUITS; EPITAXIAL GROWTH; INTEGRATED CIRCUIT LAYOUT; LEAKAGE CURRENTS; MULTILAYERS; SILICON ON INSULATOR TECHNOLOGY; SILICON WAFERS; THIN FILMS;

EPITAXIAL LATERAL OVERGROWTH; FULLY DEPLETED SILICON ON INSULATOR MOSFET; MULTIPLE LAYERS OF SILICON ON INSULATOR DEVICE ISLANDS; SELECTIVE EPITAXIAL GROWTH; SUBTHRESHOLD LEAKAGE;

MOSFET DEVICES;

EID: 0032689479     PISSN: 07413106     EISSN: None     Source Type: Journal    
DOI: 10.1109/55.761012     Document Type: Article

References (11)

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