Limit on the addressability of fault-tolerant nanowire decoders

IEEE Transactions on Computers

Volumn 58, Issue 1, 2009, Pages 60-68

  Chee, Yeow Meng ^a   Ling, Alan C H ^b  

^a NANYANG TECHNOLOGICAL UNIVERSITY   (Singapore)

^b University of Vermont ^*  (United States)

Author keywords

EC AUED codes; Fault tolerance; Nanowire crossbar; Nanowire decoder; Sperner families

Indexed keywords

CODES (SYMBOLS); DECODING; ELECTRIC WIRE; ERRORS; FAULT TOLERANCE; QUALITY ASSURANCE; RELIABILITY;

AREA EFFICIENCIES; EC/AUED CODES; FABRICATION ERRORS; FAULT-TOLERANT; NANOWIRE CROSSBAR; NANOWIRE CROSSBARS; NANOWIRE DECODER; NANOWIRE DECODERS; POOLING DESIGNS; SET SYSTEMS; SPERNER FAMILIES; TIGHT BOUNDS;

NANOWIRES;

EID: 57349167294     PISSN: 00189340     EISSN: None     Source Type: Journal    
DOI: 10.1109/TC.2008.130     Document Type: Article

References (63)

1. A.M. Morales and C.M. Lieber, "A Laser Ablation Method for Synthesis of Crystalline Semiconductor Nanowires," Science, vol. 279, pp. 208-211, 1998.
2. C. Dekker, "Carbon Nanotubes as Molecular Quantum Wires," Physics Today, vol. 52, pp. 22-28, 1999.
3. Y. Cui, C. Lieber, L. Lauhon, M. Gudiksen, and J. Wang, "Diameter Controlled Synthesis of Single Crystal Silicon Nanowires," Applied Physics Letters, vol. 78, pp. 2214-2216, 2001.
4. N.A. Melosh, A. Boukai, F. Diana, B. Gerardot, A. Badolato, P.M. Petroff, and J.R. Heath, "Ultrahigh-Density Nanowire Lattices and Circuits," Science, vol. 300, pp. 112-115, 2003.
5. E. Johnston-Halperin, R. Beckman, Y. Luo, N. Melosh, J. Green, and J. Heath, "Fabrication of Conducting Silicon Nanowire Arrays," Applied Physics Letters, vol. 96, pp. 5921-5923, 2004.
6. J.R. Heath, P.J. Kuekes, G.S. Snider, and R.S. Williams, "A Defect-Tolerant Computer Architecture: Opportunities for Nanotechnology," Science, vol. 280, pp. 1716-1721, 1998.
7. J. Chen, M.A. Reed, A.M. Rawlett, and J.M. Tour, "Large On-Off Ratios and Negative Differential Resistance in a Molecular Electronic Device," Science, vol. 286, pp. 1550-1552, 1999.
8. P.J. Kuekes, S. Williams, and J.R. Heath, Molecular Wire Crossbar Memory, US patent 6,128,214, 2000.
9. T. Rueckes, K. Kim, E. Joselevich, G. Tseng, C. Cheung, and C. Lieber, "Carbon Nanotube Based Nonvolatile Random Access Memory for Molecular Computing," Science, vol. 289, pp. 94-97, 2000.
10. P.J. Kuekes and S. Williams, Demultiplexer for a Molecular Wire Crossbar Network (MWCN DEMUX), US patent 6,256,767 B1, 2001.
11. P.J. Kuekes, S. Williams, and J.R. Heath, Molecular Wire Crossbar Interconnect (MWCI) for Signal Routing and Communications, US patent 6,314,019 B1, 2001.
12. M.A. Reed, J. Chen, A.M. Rawlett, D.W. Price, and J.M. Tour, "Molecular Random Access Memory Cell," Applied Physics Letters, vol. 78, no. 23, pp. 3735-3737, 2001.
13. J. Chen, W. Wang, J. Klemic, M.A. Reed, W. Axelrod, D.M. Kaschak, A.M. Rawlett, D.W. Price, S.M. Dirk, J.M. Tour, D.S. Grubisha, and D.W. Bennett, "MolecularWires, Switches, and Memories," Annals of the New York Academy of Sciences, vol. 960, pp. 69-99, 2002.
14. Y. Luo, P.C. Collier, J.O. Jeppesen, E. Delonno, G. Ho, J. Perkins, H.R. Tseng, T. Yamamoto, J.F. Stoddart, and J.R. Heath, "Two-Dimensional Molecular Electronics Circuits," ChemPhysChem, vol. 3, no. 6, pp. 519-525, 2002.
15. Y. Chen, G.-Y. Jung, D.A.A. Ohlberg, X. Li, D.R. Stewart, J.O. Jeppeson, K.A. Nielson, J.F. Stoddart, and R.S. Williams, "Nanoscale Molecular-Switch Crossbar Circuits," Nanotechnology, vol. 14, pp. 462-468, 2003.
16. A. DeHon, "Array-Based Architecture for FET-Based Nanoscale Electronics," IEEE Trans. Nanotechnology, vol. 2, pp. 23-32, 2003.
17. A. DeHon, S.C. Goldstein, P. Kuekes, and P. Lincoln, "Nonphotolithographic Nanoscale Memory Density Prospects," IEEE Trans. Nanotechnology, vol. 4, pp. 215-228, 2005.
18. B. Gojman, E. Rachlin, and J.E. Savage, "Evaluation of Design Strategies for Stochastically Assembled Nanoarray Memories," ACM J. Emerging Technologies in Computing Systems, vol. 1, no. 2, pp. 73-108, 2005.
19. D. Whang, S. Jin, Y. Wu, and C.M. Lieber, "Large-Scale Hierarchical Organization of Nanowire Arrays for Integrated Nanosystems," Nano Letters, vol. 3, no. 9, pp. 1255-1259, 2003.
20. C.P. Collier, E.W. Wong, M. Belohradský, F.M. Raymo, J.F. Stoddart, P.J. Kuekes, R.S. Williams, and J.R. Heath, "Electronically Configurable Molecular-Based Logic Gates," Science, vol. 285, pp. 391-394, 1999.
21. C.P. Collier, G. Mattersteig, E.W. Wong, Y. Luo, K. Beverly, J. Sampaio, F. Raymo, J.F. Stoddart, and J.R. Heath, "A [2]Catenate-Based Solid State Electronically Reconfigurable Switch," Science, vol. 290, pp. 1172-1175, 2000.
22. X. Duan, Y. Huang, and C.M. Lieber, "Nonvolatile Memory and Programmable Logic from Molecule-Gated Nanowires," Nano Letters, vol. 2, no. 5, pp. 487-490, 2002.
23. P.J. Kuekes, W. Robinett, G. Seroussi, and R.S. Williams, "Defect-Tolerant Interconnect to Nanoelectronic Circuits: Internally Redundant Demultiplexers Based on Error-Correcting Codes," Nanotechnology, vol. 16, no. 6, pp. 869-882, 2005.
24. E. Rachlin and J.E. Savage, "Nanowire Addressing in the Face of Uncertainty," Proc. IEEE CS Ann. Symp. Emerging VLSI Technologies and Architectures (ISVLSI '06), pp. 225-230, 2006.
25. E. Rachlin and J.E. Savage, "Nanowire Addressing with Randomized Contact Decoders," Proc. IEEE/ACM Int'l Conf. Computer-Aided Design (ICCAD '06), pp. 735-742, 2006.
26. A. DeHon, P. Lincoln, and J.E. Savage, "Stochastic Assembly of Sublithographic Nanoscale Interfaces," IEEE Trans. Nanotechnology vol. 2, no. 3, pp. 165-174, 2003.
27. A. DeHon, C.M. Lieber, P. Lincoln, and J.E. Savage, Stochastic Assembly of Sublithographic Nanoscale Interfaces, US patent 6,900,479 B2, 2005.
28. C.S. Cojocaru, J.M. Padovani, T. Wade, C. Mandoli, G. Jaskierowicz, J.E. Wegrowe, A.F. Morral, and D. Pribat, "Conformal Anodic Oxidation of Aluminium Thin Films," Nano Letters, vol. 5, no. 4, pp. 675-680, 2005.
29. J. Woodruff, J. Ratchford, H. Jagannathan, H. Adhikari, H.-S.P. Wong, and C.E.D. Chidsey, "Deterministic Nanowire Growth," Proc. SRC Techcon Conf., pp. 22-24, 2005.
30. Y. Huang, X. Duan, Q. Wei, and C.M. Lieber, "Directed Assembly of One-Dimensional Nanostructures into Functional Networks," Science vol. 291, pp. 630-633, 2001.
31. F. Kim, S. Kwan, J. Akana, and P. Yang, "Langmuir-Blodgett Nanorod Assembly," pp. 4360-4361, 2001.
32. M.T. Björk, B.J. Ohlsson, T. Sass, A.I. Persson, C. Thelander, M.H. Magnusson, K. Deppert, L.R. Wallenberg, and L. Samuelson, "One-Dimensional Steeplechase for Electrons Realized," Nano Letters vol. 2, no. 2, pp. 87-89, 2002.
33. M.S. Gudiksen, L.J. Lauhon, J. Wang, D.C. Smith, and C.M. Lieber, "Growth of Nanowire Superlattice Structures for Nanoscale Photonics and Electronics," Nature, vol. 415, pp. 617-620, 2002.
34. Y. Wu, R. Fan, and P. Yang, "Block-by-Block Growth of Single-Crystal Si/SiGe Superlattice Nanowires," Nano Letters, vol. 2, no. 2, pp. 83-86, 2002.
35. L.J. Lauhon, M.S. Gudiksen, D. Wang, and C.M. Lieber, "Epitaxial Core-Shell and Core-Multishell Nanowire Heterostructures," Nature vol. 420, pp. 57-61, 2002.
36. J.E. Savage, E. Rachlin, A. DeHon, C.M. Lieber, and Y. Wu, "Radial Addressing of Nanowires," ACM J. Emerging Technologies in Computing Systems, vol. 2, no. 2, pp. 129-154, 2006.
37. D.J. Balding and D.C. Torney, "Optimal Pooling Designs with Error Detection," J. Combinatorial Theory Series A, vol. 74, no. 1, pp. 131-140, 1996.
38. Y.M. Chee, "Tura'n-Type Problems in Group Testing, Coding Theory and Cryptography," PhD dissertation, Univ. of Waterloo, Ontario, Canada, June 1996.
39. R.J.R. Abel and M. Greig, "BIBDs with Small Block Size," The CRC Handbook of Combinatorial Designs, second ed., C.J. Colbourn and J.H. Dinitz, eds., pp. 71-79, CRC Press, 2007.
40. C.J. Colbourn and R. Mathon, "Steiner Systems," The CRC Handbook of Combinatorial Designs, second ed., C.J. Colbourn and J.H. Dinitz, eds., pp. 102-110, CRC Press, 2007.
41. R. Craigen and H. Kharaghani, "Hadamard Matrices and Hadamard Designs," The CRC Handbook of Combinatorial Designs, second ed., C.J. Colbourn and J.H. Dinitz, eds., pp. 273-280, CRC Press, 2007.
42. Y.J. Ionin and T. van Trung, "Symmetric Designs," The CRC Handbook of Combinatorial Designs, second ed., C.J. Colbourn and J.H. Dinitz, eds., pp. 110-124, CRC Press, 2007.
43. G.B. Khosrovshahi and R. Laue, "t-Designs with ≥ 3," The CRC Handbook of Combinatorial Designs, second ed., C.J. Colbourn and J.H. Dinitz, eds., pp. 79-101, CRC Press, 2007.
44. R. Mathon and A. Rosa, "2-(v, k, λ) Designs of Small Order," The CRC Handbook of Combinatorial Designs, second ed., C.J. Colbourn and J.H. Dinitz, eds., pp. 25-58, CRC Press, 2007.
45. G.H.J. van Rees, "(r, λ)-Designs" The CRC Handbook of Combinatorial Designs, second ed., C.J. Colbourn and J.H. Dinitz, eds., pp. 582-584, CRC Press, 2007.
46. D.C. Torney, "Pooling Designs," The CRC Handbook of Combinatorial Designs, second ed., C.J. Colbourn and J.H. Dinitz, eds., pp. 574-575, CRC Press, 2007.
47. E. Sperner, "Ein Satz über Untermengen einer endlichen Menge," Matematische Zeitschrift, vol. 27, pp. 544-548, 1928.
48. B. Bollobás, Combinatorics. Cambridge Univ. Press, 1986.
49. I. Anderson, Combinatorics of Finite Sets. Oxford Univ. Press, 1987.
50. G.O.H. Katona, "Strong Qualitative Independence," Discrete Applied Math., vol. 137, no. 1, pp. 87-95, 2004.
51. D.K. Pradhan, "A New Class of Error-Correcting/Detecting Codes for Fault-Tolerant Computer Applications," IEEE Trans. Computers, vol. 29, no. 6, pp. 471-481, June 1980.
52. A.G. D'yachkov, V.V. Rykov, and A.M. Rashad, "Superimposed Distance Codes," Problems of Control Information Theory/Problemy Upravlen. Teor. Inform., vol. 18, pp. 237-250, 1989.
53. e Disjunct Matrices," Discrete Applied Math., vol. 80, pp. 217-222, 1997.
54. D.R. Stinson and R. Wei, "Generalized Cover-Free Families," Discrete Math., vol. 279, pp. 463-477, 2004.
55. M. Plotkin, "Binary Codes with Specified Minimum Distance," IRE Trans. Information Technology, vol. 6, pp. 445-450, 1960.
56. V.I. Levenshtein, "Upper-Bound Estimates for Fixed-Weight Codes," Problems of Information Transmission, vol. 7, no. 4, pp. 281-287, 1971.
57. C.-S. Laih and C.-N. Yang, "On the Analysis and Design of Group Theoretical t-syEC=AUED Codes," IEEE Trans. Computers, vol. 45, no. 1, pp. 103-108, Jan. 1996.
58. M.R. Best, A.E. Brouwer, F.J. MacWilliams, A.M. Odlyzko, and N.J.A. Sloane, "Bounds for Binary Codes of Length Less Than 25," IEEE Trans. Information Theory, vol. 24, no. 1, pp. 81-93, 1978.
59. E.M. Rains and N.J.A. Sloane, "Table of Constant Weight Binary Codes," http://www.research.att.com/∼njas/codes/Andw/, 2008.
60. S. Al-Bassam and B. Bose, "Design of Efficient Error-Correcting Balanced Codes," IEEE Trans. Computers, vol. 42, no. 10, pp. 1261-1266, Oct. 1993.
61. M.-C. Lin, "Constant Weight Codes for Correcting Symmetric Errors and Detecting Unidirectional Errors," IEEE Trans. Computers, vol. 42, no. 11, pp. 1294-1302, Nov. 1993.
62. D. Nikolos, N. Gaitanis, and G. Philokyprou, "Systematic t-Error Correcting/All Unidirectional Error Detecting Codes," IEEE Trans. Computers, vol. 35, no. 5, pp. 394-402, May 1986.
63. F.J.H. Böinck and H.C.A. van Tilborg, "Constructions and Bounds for Systematic tEC=AUED Codes," IEEE Trans. Information Theory, vol. 36, no. 6, pp. 1381-1390, 1990.