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Volumn 54, Issue 11 SPEC. ISS., 2007, Pages 2489-2501

3-D nFPGA: A reconfigurable architecture for 3-D CMOS/nanomaterial hybrid digital circuits

Author keywords

3 D integration; Nanoelectronics; Nanotube; Nanowire; Performance; Reconfigurable logic

Indexed keywords

BENCHMARKING; CARBON NANOTUBES; CMOS INTEGRATED CIRCUITS; COMPUTER AIDED DESIGN; FAULT TOLERANCE; FIELD PROGRAMMABLE GATE ARRAYS (FPGA); NANOELECTRONICS; NANOTUBES; NANOWIRES; RECONFIGURABLE ARCHITECTURES; THREE DIMENSIONAL INTEGRATED CIRCUITS; TIMING CIRCUITS;

EID: 51949107529     PISSN: 10577122     EISSN: None     Source Type: Journal    
DOI: 10.1109/TCSI.2007.907844     Document Type: Article
Times cited : (50)

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* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.