Exploring potential benefits of 3D FPGA integration

Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)

Volumn 3203, Issue , 2004, Pages 874-880

  Ababei, Cristinel ^a   Maidee, Pongstorn ^a   Bazargan, Kia ^a  

^a University of Minnesota   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

DELAY CIRCUITS; INTEGRATION; WIRE;

3-D INTEGRATION; CRITICAL PATHS; DELAY REDUCTION; EMPIRICAL ANALYSIS; FPGA INTEGRATION; PARTITIONING-BASED PLACEMENT; POTENTIAL BENEFITS; TIMING-DRIVEN;

FIELD PROGRAMMABLE GATE ARRAYS (FPGA);

EID: 84889831892     PISSN: 03029743     EISSN: 16113349     Source Type: Book Series    
DOI: 10.1007/978-3-540-30117-2_92     Document Type: Conference Paper

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