Globally optimized robust systems to overcome scaled CMOS reliability challenges

Proceedings -Design, Automation and Test in Europe, DATE

Volumn , Issue , 2008, Pages 941-946

  Mitra, Subhasish ^a  

^a STANFORD UNIVERSITY   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

ABSTRACTION LAYERS; BUILT-IN SOFT ERROR RESILIENCE; FAILURE PREDICTION; ROBUST SY STEMS; ROBUST SYSTEM DESIGN; SCALED CMOS; SELF TESTING; SYSTEM DESIGNS;

ABSTRACTING; COST EFFECTIVENESS; INDUSTRIAL ENGINEERING; MATHEMATICAL PROGRAMMING; OPTIMIZATION; SYSTEMS ANALYSIS; TESTING;

GLOBAL OPTIMIZATION;

EID: 49749121091     PISSN: 15301591     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/DATE.2008.4484801     Document Type: Conference Paper

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