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Volumn 10, Issue 4-5, 2007, Pages 133-142

A novel bumping process for fine pitch Sn-Cu lead-free plating-based flip chip solder bumps

Author keywords

Electroplating; Fine pitch; Flip chip; Polishing; Solder bump

Indexed keywords

COPPER; ELECTRONICS PACKAGING; ELECTROPLATING; OPTIMIZATION; PARAMETER ESTIMATION; TIN;

EID: 40849089206     PISSN: 13698001     EISSN: None     Source Type: Journal    
DOI: 10.1016/j.mssp.2007.07.001     Document Type: Article
Times cited : (30)

References (38)
  • 1
    • 0141565326 scopus 로고    scopus 로고
    • Gheorghe Pascariu, Peter Cronin, Daniel Crowley, Next generation electronics packaging utilizing flip chip technology. In: IEEE/CPMT/SEMI international electronics manufacturing technology symposium, 2003. p. 423.
    • Gheorghe Pascariu, Peter Cronin, Daniel Crowley, Next generation electronics packaging utilizing flip chip technology. In: IEEE/CPMT/SEMI international electronics manufacturing technology symposium, 2003. p. 423.
  • 2
    • 0344011646 scopus 로고    scopus 로고
    • Electromigration in flip chip solder bump of 97Pb-3Sn/37Pb-63Sn combination structure
    • Nah J.-W., Kim J.H., Lee H.M., and Paik K.-W. Electromigration in flip chip solder bump of 97Pb-3Sn/37Pb-63Sn combination structure. Elsevier, J Acta Mater (2003) 129
    • (2003) Elsevier, J Acta Mater , pp. 129
    • Nah, J.-W.1    Kim, J.H.2    Lee, H.M.3    Paik, K.-W.4
  • 3
    • 0038819078 scopus 로고    scopus 로고
    • CrCu based UBM (under bump metallization) study with electroplated Pb/63Sn solder bumps interfacial reaction and bump shear strengthen
    • Jang S.-Y., Wolf J., Ehrmann O., Gloor H., and Schreiber T. CrCu based UBM (under bump metallization) study with electroplated Pb/63Sn solder bumps interfacial reaction and bump shear strengthen. IEEE Trans Components Packag Technol 26 1 (2003) 245
    • (2003) IEEE Trans Components Packag Technol , vol.26 , Issue.1 , pp. 245
    • Jang, S.-Y.1    Wolf, J.2    Ehrmann, O.3    Gloor, H.4    Schreiber, T.5
  • 4
    • 27844485140 scopus 로고    scopus 로고
    • Formation of Pb/63Sn solder bumps using a solder droplet jetting method
    • Son H.-Y., Nah J.-W., and Pailk K. Formation of Pb/63Sn solder bumps using a solder droplet jetting method. IEEE Trans Packag Manuf 28 3 (2005) 274
    • (2005) IEEE Trans Packag Manuf , vol.28 , Issue.3 , pp. 274
    • Son, H.-Y.1    Nah, J.-W.2    Pailk, K.3
  • 5
    • 84954039395 scopus 로고    scopus 로고
    • Ultra-fine pitch eutectic solder bumping with fine particle size paste for nano packaging
    • Kripesh V., Kwanm W.W., and Iyer M. Ultra-fine pitch eutectic solder bumping with fine particle size paste for nano packaging. IEEE Electron Packag Technol Conf (2003) 732
    • (2003) IEEE Electron Packag Technol Conf , pp. 732
    • Kripesh, V.1    Kwanm, W.W.2    Iyer, M.3
  • 10
    • 33244467254 scopus 로고    scopus 로고
    • High density of electrodeposited Sn/Ag bumps for flip chip connection
    • Bigas M., and Cabruja E. High density of electrodeposited Sn/Ag bumps for flip chip connection. J Microelectron Eng (2006) 399
    • (2006) J Microelectron Eng , pp. 399
    • Bigas, M.1    Cabruja, E.2
  • 11
    • 4644219566 scopus 로고    scopus 로고
    • Gupta D, Kalle F, Fria M. Evaluation of a low-cost column bump technology for fine pitch flip chip and WLP. In: IEEE/SEMI international electronics manufacturing technology symposium, 2004.
    • Gupta D, Kalle F, Fria M. Evaluation of a low-cost column bump technology for fine pitch flip chip and WLP. In: IEEE/SEMI international electronics manufacturing technology symposium, 2004.
  • 17
    • 10444251048 scopus 로고    scopus 로고
    • Electroplated Sn-Au structures for fabricating fluxless flip chip Sn-rich solder joints
    • Kim J., Kim D., Wang G.L., Park J., and Lee C.C. Electroplated Sn-Au structures for fabricating fluxless flip chip Sn-rich solder joints. IEEE Electron Components Technol Conf 1 (2004) 1642
    • (2004) IEEE Electron Components Technol Conf , vol.1 , pp. 1642
    • Kim, J.1    Kim, D.2    Wang, G.L.3    Park, J.4    Lee, C.C.5
  • 18
    • 40849124029 scopus 로고    scopus 로고
    • 〈http://ap.pennnet.com/Articles/Article_Display.cfm?Section=Article s&Subsection=Display&ARTICLE_ID=233628〉
  • 19
    • 0033098524 scopus 로고    scopus 로고
    • Materials issues in area-array microelectronic packaging
    • Robinson J.J. Materials issues in area-array microelectronic packaging. J JOM 51 3 (1999) 25
    • (1999) J JOM , vol.51 , Issue.3 , pp. 25
    • Robinson, J.J.1
  • 20
    • 0036398189 scopus 로고    scopus 로고
    • Jordan J. Gold stud bump in flip-chip applications. In: International electronics manufacturing technology (IEMT) symposium, 2002. p. 113.
    • Jordan J. Gold stud bump in flip-chip applications. In: International electronics manufacturing technology (IEMT) symposium, 2002. p. 113.
  • 21
    • 0030285449 scopus 로고    scopus 로고
    • Approaching a uniform bump height of the electroplated solder bumps on a silicon wafer
    • Lin K.-L., and Chang S.-Y. Approaching a uniform bump height of the electroplated solder bumps on a silicon wafer. IEEE Trans Components, Packag, Manuf Technol-Part B 19 4 (1996) 747
    • (1996) IEEE Trans Components, Packag, Manuf Technol-Part B , vol.19 , Issue.4 , pp. 747
    • Lin, K.-L.1    Chang, S.-Y.2
  • 22
    • 40849136096 scopus 로고    scopus 로고
    • Ihara Yoshihiro, Kanazawa Takeo, Kobayashi Tsuyoshi. Method of forming bumps by electroplating. United States Patent, 6975127 B2, December13, 2005.
    • Ihara Yoshihiro, Kanazawa Takeo, Kobayashi Tsuyoshi. Method of forming bumps by electroplating. United States Patent, 6975127 B2, December13, 2005.
  • 23
    • 40849106415 scopus 로고    scopus 로고
    • DiOrio Mark L. Planarizing and testing of BGA packages. United States Patent 6975127 B2, December13, 2005.
    • DiOrio Mark L. Planarizing and testing of BGA packages. United States Patent 6975127 B2, December13, 2005.
  • 24
    • 40849139231 scopus 로고    scopus 로고
    • Kellar Scot A, Kim Sarah E, Scott List R. Wafer bonding using a flexible bladder press and thinned wafers for three-dimensional (3D) wafer-to-wafer vertical stack integration and application thereof. United States Patent 6975016 B2, December13, 2005.
    • Kellar Scot A, Kim Sarah E, Scott List R. Wafer bonding using a flexible bladder press and thinned wafers for three-dimensional (3D) wafer-to-wafer vertical stack integration and application thereof. United States Patent 6975016 B2, December13, 2005.
  • 25
    • 40849126654 scopus 로고    scopus 로고
    • Chen Chih-Shun, Suo Chao-Dung, Jao Jui-Meng, Yang Ke-Chuan, Chien Feng-Lung. Method of fabricating solder bumps with high co-planarity for flip-chip application," United States Patent 6348401 B1, February 19, 2002.
    • Chen Chih-Shun, Suo Chao-Dung, Jao Jui-Meng, Yang Ke-Chuan, Chien Feng-Lung. Method of fabricating solder bumps with high co-planarity for flip-chip application," United States Patent 6348401 B1, February 19, 2002.
  • 26
    • 0036290896 scopus 로고    scopus 로고
    • The effect of via size on fine pitch and high density solder bumps for wafer level packaging
    • Ju C.W., Kim S.J., Pack K.H., and Lee H.T. The effect of via size on fine pitch and high density solder bumps for wafer level packaging. IEEE Electron Components Technol Conf (2002) 1181
    • (2002) IEEE Electron Components Technol Conf , pp. 1181
    • Ju, C.W.1    Kim, S.J.2    Pack, K.H.3    Lee, H.T.4
  • 27
    • 0034447090 scopus 로고    scopus 로고
    • Karim Zaheed S, Schetty Rob. Lead-Free bump interconnections for flip-chip applications. In: IEEE/CPMT international electronics manufacturing technology symposium, 2000. p. 276.
    • Karim Zaheed S, Schetty Rob. Lead-Free bump interconnections for flip-chip applications. In: IEEE/CPMT international electronics manufacturing technology symposium, 2000. p. 276.
  • 28
    • 40849114617 scopus 로고    scopus 로고
    • Izumi Takayuki, Okajima Takehiko. Electroplating apparatus. United States Patent 6093291, July 25, 2000.
    • Izumi Takayuki, Okajima Takehiko. Electroplating apparatus. United States Patent 6093291, July 25, 2000.
  • 29
    • 40849145496 scopus 로고    scopus 로고
    • Woo Christy Mei-Chu, Iacoponi John A, Yang Kai. Electroplating uniformity by diffuser design. United States Patent 6103085, August 15, 2000.
    • Woo Christy Mei-Chu, Iacoponi John A, Yang Kai. Electroplating uniformity by diffuser design. United States Patent 6103085, August 15, 2000.
  • 30
    • 40849114616 scopus 로고    scopus 로고
    • 〈http://www.citizen.co.jp/english/bump/solderbump/〉.
  • 31
    • 40849140783 scopus 로고    scopus 로고
    • 〈http://www.intraglobal.net/Page03%20RFID/Photo/Photo%20ID/PDF%20Sp ec/DES%20FIRE%2001.pdf#search='bump%20height%20uniformity'〉.
  • 32
    • 40849130939 scopus 로고    scopus 로고
    • 〈http://www.ust.com.tw/c-products.htm〉.
  • 33
    • 40849097580 scopus 로고    scopus 로고
    • 〈http://www.sewonlcd.com/data/bump.htm〉.
  • 34
    • 40849094299 scopus 로고    scopus 로고
    • 〈http://www.tlmicorp.com/serv_solder.htm〉.
  • 35
    • 40849092581 scopus 로고    scopus 로고
    • 〈http://www.ellipsiz-microfab.com/excel/designrules.pdf#search='uni formity%20%20bump'〉.
  • 36
    • 40849086234 scopus 로고    scopus 로고
    • 〈http://www.advanpack.com/solderBumping.html〉.
  • 37
    • 40849087882 scopus 로고    scopus 로고
    • 〈http://www.apialliance.com/pdf/Archive_05/SMIC_Zheng.pdf#search='B ump%20Height%20Uniformity'〉.
  • 38
    • 32144449910 scopus 로고    scopus 로고
    • Characteristics of Sn-Cu solder bump formed by electroplating for flip chip
    • Jung S.W., Jung J.P., and (Norman) Zhou Y. Characteristics of Sn-Cu solder bump formed by electroplating for flip chip. IEEE Trans Electron Packag Manuf 29 1 (2006) 13
    • (2006) IEEE Trans Electron Packag Manuf , vol.29 , Issue.1 , pp. 13
    • Jung, S.W.1    Jung, J.P.2    (Norman) Zhou, Y.3


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.