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Nano Letters
Volumn 7, Issue 10, 2007, Pages 3214-3218
InAs/InP radial nanowire heterostructures as high electron mobility devices
Author keywords

[No Author keywords available]
Indexed keywords

ELECTRICAL MEASUREMENTS; ELECTRON MOBILITY DEVICES; NANOELECTRONIC CIRCUITS; PHOTONIC PROPERTIES; QUANTUM COHERENT TRANSPORT; RADIAL NANOWIRES;
EID: 36248972352     PISSN: 15306984     EISSN: None     Source Type: Journal    
DOI: 10.1021/nl072024a     Document Type: Article
Times cited : (359)
References (37)
  • 22
    • 84858476385 scopus 로고    scopus 로고
    • Thermal evaporation and vapor transport method were used for the synthesis of InAs/lnP NWs. The synthesis set-up includes a two-zone tube furnace (with zone I at upstream and zone II at downstream) and an in situ source exchange unit. In a typical growth, a few grams of InAs and InP powders (Alfa Aesar) were loaded into two individual quartz transfer tubes located at the upstream end of the reactor, while a Si/SiO2 substrate with well dispersed 10 nm gold nanoclusters (Ted Pella) was placed into zone II of the tube furnace. The reactor was then evacuated to 15 mTorr, heated up to the set temperature, and maintained at a certain pressure with H2 flow. For the InAs core synthesis, after zone I and zone II had reached set temperatures of 690 and 530°C, respectively, the transfer tube with InAs powder was inserted into the center of zone I to initiate the growth. A total pressure of 2 torr was maintained during the growth process, with a 20 seem flow of H 2
    • 2. After 40 min, the axial growth of InAs NW was terminated by pulling out the transfer tube with InAs source. Then, the furnace temperature was reset to be 710 and 500°C for zone I and zone II, respectively, and the transfer tube with InP powder was inserted into zone I to start the InP shell deposition. The deposition time is controlled to be 2 min, corresponding to the formation of a ∼2 nm InP shell according to TEM analysis.
  • 27
    • 84858477623 scopus 로고    scopus 로고
    • According to charge control model, dI/dVg, gm, μ(Cg/Lg2) V ds, where μ is the mobility and Cg is the gate capacitance. For current case, Lg, 4 μm, V ds, 0.1 V, and the Cg value was estimated using the Quickfield program. For a 25 nm diameter In As/InP nanowire (21 nm diameter InAs core and 2 nm InP shell) on a degeneratively doped Si substrate with 50nm SiO2 dielectric layer in a global backgate configuration, the calculation yields a value of ∼52 aF/μm
    • 2 dielectric layer in a global backgate configuration, the calculation yields a value of ∼52 aF/μm.
  • 30
    • 84858476308 scopus 로고    scopus 로고
    • 2/ Vs in top-gate devices. This value was calculated using a different method from other results; we have compared value calculated in a similar manner for consistency.
    • 2/ Vs in top-gate devices. This value was calculated using a different method from other results; we have compared value calculated in a similar manner for consistency.
  • 33
    • 84858466130 scopus 로고    scopus 로고
    • 2 deposition were carried out at 110°C, with each cycle consisting of a 1 s water vapor pulse, a 5 s nitrogen purge, a 3 s precursor, and a 5 s nitrogen purge. Electron beam lithography was used to define top-gate electrodes, followed by thermal evaporation of Ti/Au (5 nm/50 nm) as the gate metal. The top gate overlaps with the source/drain electrodes to ensure full coverage of the channel.
    • 2 deposition were carried out at 110°C, with each cycle consisting of a 1 s water vapor pulse, a 5 s nitrogen purge, a 3 s precursor, and a 5 s nitrogen purge. Electron beam lithography was used to define top-gate electrodes, followed by thermal evaporation of Ti/Au (5 nm/50 nm) as the gate metal. The top gate overlaps with the source/drain electrodes to ensure full coverage of the channel.

* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.