Implementation of initial-on ESD protection concept with PMOS-triggered SCR devices in deep-submicron CMOS technology

IEEE Journal of Solid-State Circuits

Volumn 42, Issue 5, 2007, Pages 1158-1167

  Ker, Ming Dou ^a,b   Chen, Shih Hung ^b,c  

^a IEEE   (Taiwan)

^b NATIONAL CHIAO TUNG UNIVERSITY   (Taiwan)

^c INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE   (Taiwan)

Author keywords

Electrostatic discharges (ESD); Holding voltage; Silicon controlled rectifier (SCR); Turn on efficiency

Indexed keywords

CMOS TECHNOLOGY; ELECTROSTATIC DISCHARGE PROTECTION; HOLDING VOLTAGE; PROCESS MODIFICATION;

CMOS INTEGRATED CIRCUITS; ELECTRIC POTENTIAL; FLIP FLOP CIRCUITS; MOS DEVICES; THYRISTORS;

ELECTROSTATIC DISCHARGE;

EID: 34247372238     PISSN: 00189200     EISSN: None     Source Type: Journal    
DOI: 10.1109/JSSC.2007.894823     Document Type: Conference Paper

References (17)

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