Efficient on-line interconnect testing in FPGAs with provable detectability for multiple faults

Proceedings -Design, Automation and Test in Europe, DATE

Volumn 1, Issue , 2006, Pages

  Suthar, Vishal ^a   Dutt, Shantanu ^a  

^a UNIVERSITY OF ILLINOIS AT CHICAGO   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

BUILT-IN SELF TEST; ELECTRIC FAULT CURRENTS; ELECTRIC POWER SYSTEM INTERCONNECTION; ONLINE SYSTEMS; SWITCHING SYSTEMS;

GLOBAL DETAILED TESTING; ONLINE INTERCONNECT; SWITCH FAULTS; WIRE SEGMENTS;

FIELD PROGRAMMABLE GATE ARRAYS (FPGA);

EID: 34047175434     PISSN: 15301591     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/date.2006.244017     Document Type: Conference Paper

References (17)

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