A unified nonquasi-static MOSFET model for large-signal and small-signal simulations

IEEE Transactions on Electron Devices

Volumn 53, Issue 9, 2006, Pages 2035-2042

  Wang, Hailing ^a,b,c   Li, Xin ^b,d   Wu, Weimin ^b,d   Gildenblat, Gennady ^a,b,d   Van Langevelde, Ronald ^a,e   Smit, Geert D J ^e   Scholten, Andries J ^e   Klaassen, Dirk B M ^a,e  

^a IEEE   (United States)

^b The Pennsylvania State University   (United States)

^c IBM MICROELECTRONICS   (United States)

^d Arizona State University   (United States)

^e PHILIPS RESEARCH LABORATORIES   (Netherlands)

Author keywords

Compact model; Nonquasi static (NQS); PSP model; Spline collocation method; Surface potential

Indexed keywords

COMPACT MODELS; MODEL ACCURACY; NONQUASI-STATIC (NQS) MODEL; SPLINE COLLOCATION METHOD;

CIRCUIT SIMULATION; SEMICONDUCTOR DEVICE MODELS; SURFACE POTENTIAL; TWO DIMENSIONAL;

MISFET DEVICES;

EID: 33947178854     PISSN: 00189383     EISSN: None     Source Type: Journal    
DOI: 10.1109/TED.2005.881003     Document Type: Article

References (40)

1. Y. P. Tsividis and K. Suyama, "MOSFET modeling for analog circuit CAD: Problems and prospects," IEEE J. Solid-Slate Circuits, vol. 29, no. 3, pp. 210-216, Mar. 1994.
2. C. Turchetti, P. Mancini, and G. Masetti, "A CAD-oriented non-quasistatic approach for the transient analysis of MOS ICs," IEEE J. Solid-State Circuits, vol. SSC-21, no. 5, pp. 827-836, Oct. 1986.
3. H. J. Park, P. K. Ko, and C. Hu, "A non-quasi-static MOSFET model for SPICE - Transient analysis," IEEE Trans. Electron Devices, vol. 36, no. 3, pp. 561-576, Mar. 1989.
4. W. Liu, C. Bowen, and M.-C. Chang, "A CAD-compatible non-quasistatic MOSFET model," in IEDM Tech. Dig., 1996, pp. 151-154.
5. S. W. Hwang, T.-W. Yoon, D. H. Kwon, and K. H. Kim, "A physics-based, SPICE (Simulation Program with Integrated Circuit Emphasis) - compatible non-quasi-static MOS (metal-oxide-semiconductor) transient model based on the collocation method," Jpn. J. Appl. Phys., vol. 37, no. 2A, pp. L119-L121, Feb. 1998.
6. A. S. Roy, J. M. Vasi, and M. B. Patil, "A new approach to model nonquasi-static (NQS) effects for MOSFETs - Part I: Large-signal analysis," IEEE Trans. Electron Devices, vol. 50, no. 12, pp. 2393-2400, Dec. 2003.
7. H. Wang, T.-L. Chen, and G. Gildenblat, "Quasi-static and nonquasistatic compact MOSFET models based on symmetric, linearization of the bulk and inversion charges," IEEE Trans. Electron Devices, vol. 50, no. 11, pp. 2262-2272, Nov. 2003.
8. E. Dubois and E. Robilliart, "Efficient non-quasi-static MOSFET's model for circuit simulation," in IEDM Tech. Dig., 1995, pp. 945-948.
9. K. W. Chai and J. J. Paulos, "Unified nonquasi-static modeling of the long-channel four-terminal MOSFET for large- and small-signal analysis in all operating regimes," IEEE Trans. Electron Devices, vol. 36, no. 11, pp. 2513-2520, Nov. 1989.
10. M. Chan, K. Y. Hui, C. Hu, and P. K. Ko, "A robust and physical BSIM3 non-quasi-static transient and AC small-signal model for circuit simulation," IEEE Trans. Electron Devices, vol. 45, no. 4, pp. 834-841, Apr. 1998.
11. A. J. Scholten, L. F. Tiemeijer, P. W. H. de Vreede, and D. B. M. Klaassen, "A large signal non-quasi-static MOS model for RF circuit simulation," in IEDM Tech. Dig., 1999, pp. 163-166.
12. J.-M. Sallese and A.-S. Porret, "A novel approach to charge-based nonquasi-static model of the MOS transistor valid in all modes of operation," Solid State Electron., vol. 44, no. 6, pp. 887-894, Jun. 2000.
13. A.-S. Porret, J.-M. Sallese, and C. C. Enz, "A compact-non-quasi- static extension of a charge-based MOS model," IEEE Trans. Electron Devices, vol. 48, no. 8, pp. 1647-1654, Aug. 2001.
14. N. Nakayama, D. Navarro, M. Tanaka, H. Ueno, M. Miura-Mattausch, H. J. Mattausch, T. Ohguro, S. Kumashiro, M. Taguchi, T. Kage, and S. Miyamoto, "Non-quasi-static model for MOSFET based on carriertransit delay," Electron. Lett., vol. 40, no. 4, pp. 276-278, Feb. 2004.
15. W.-K. Shih, S. Mudanai, R. Rios, P. Packan, D. Becher, R. Basco, C. Hung, and U. Jalan, "Predictive compact modeling of NQS effects and thermal noise in 90 nm mixed signal/RF CMOS technology," in IEDM Tech. Dig., 2004, pp. 747-750.
16. W. Liu, MOSFET Models for SPICE Simulation Including BSIM3v3 and BSIM4. New York: Wiley, 2001.
17. T. Ezaki, D. Navarro, Y. Takeda, N. Sadachika, G. Suzuki, M. Miura-Mattausch, H. J. Mattausch, T. Ohguro, T. Iizuka, M. Taguchi, S. Kumashiro, and S. Miyamoto, "Non-quasi-static analysis with HiSIM, a complete surface-potential-based MOSFET model," in Proc. Int. Conf. Mixed Des. Integr. Circuits and Syst., 2005, pp. 923-928.
18. H. Wang and G. Gildenblat, "A robust large signal non-quasi-static MOSFET model for circuit simulation," in Proc. IEEE Custom Integr. Circuits Conf., Orlando, FL, 2004, pp. 5-8.
19. H. Wang, X. Li, W. Wu, G. Gildenblat, R. van Langevelde, G. D. J. Smit, A. J. Scholten, and D. B. M. Klaassen, "Unified non-quasi-static MOSFET model for large-signal and small-signal simulations," in Proc. IEEE Custom Integr. Circuits Conf., San Jose, CA, 2005, pp. 818-821.
20. G. Gildenblat, X. Li, W. Wu, H. Wang, A. Jha, R. van Langevelde, G. D. J. Smit, A. J. Scholten, and D. B. M. Klaassen, "PSP: An advanced surface-potential-based MOSFET model for circuit simulation," IEEE Trans. Electron Devices, vol. 53, no. 9, pp. 1979-1993, Sep. 2006.
21. [Online]. Available: http://pspmodel.ee.psu.edu/
22. C. C. McAndrew and J. J. Victory, "Accuracy of approximations in MOSFET charge models," IEEE Trans. Electron Devices, vol. 49, no. 1, pp. 72-81, Jan. 2002.
23. J. Victory, C. C. McAndrew, and K. Cullappalli, "A time-dependent, surface-potential based compact model for MOS capacitors," IEEE Electron Device Lett., vol. 22, no. 5, pp. 245-247, May 2001.
24. J. Victory, Z. Yan, G. Gildenblat, C. McAndrew, and J. Zheng, "A physically based, scalable MOS varactor model and extraction methodology for RF applications," IEEE Trans. Electron Devices, vol. 52, no. 7, pp. 1343-1353, Jul. 2005.
25. X. Gu, T.-L. Chen, G. Gildenblat, G. O. Workman, S. Veeraraghavan, S. Shapira, and K. Stiles, "A surface potential-based compact model of n-MOSFET gate-tunneling current," IEEE Trans. Electron Devices, vol. 51, no. 1, pp. 127-135, Jan. 2004.
26. A. G. Sabnis and J. T. Clemens, "Characterization of the electron mobility in the inverted (100) Si surface," in IEDM Tech. Dig., 1979, pp. 18-21.
27. N. D. Arora and G. S. Gildenblat, "A semi-empirical model of the MOSFET inversion layer mobility for low-temperature operation," IEEE Trans. Electron Devices, vol. ED-34, no. 1, pp. 89-93, Jan. 1987.
28. G. Gildenblat, H. Wang, T.-L. Chen, X. Gu, and X. Cai, "SP: An advanced surface-potential-based compact MOSFET model," IEEE J. Solid-State Circuits, vol. 39, no. 9, pp. 1394-1406, Sep. 2004.
29. G. Gildenblat, X. Li, H. Wang, W. Wu, R. van Langevelde, A. J. Scholten, G. D. J. Smit, and D. B. M. Klaassen, "Introduction to PSP MOSFET model," in Proc. NSTI-Nanotechnol. Conf., 2005, pp. 19-24.
30. C.-L. Huang and N. D. Arora, "Characterization and modeling of the n- and p-channel MOSFETs inversion layer mobility in the range of 25-125°C," Solid State Electron., vol. 37, no. 1, pp. 97-103, Jan. 1994.
31. R. van Langevelde, A. J. Scholten, and D. B. M. Klaassen, "Recent enhancements of MOS model 11," in Proc. NSTI-Nanotechnol. Conf., 2004, pp. 60-65.
32. R. van Langevelde and G. Gildenblat, "PSP: An advanced surface potential based model," in Transistor Level Modeling for Analog/RF IC Design, W. Grabinski, B. Nauwelaers, and D. Schreurs, Eds. Berlin, Germany: Springer, 2006.
33. B. A. Finlayson, Method of Weighted Residuals and Variational Principles. New York: Academic, 1972.
34. D. E. Ward and R. W. Dutton, "A charge-oriented model for MOS transistor capacitances," IEEE J. Solid-Stale Circuits, vol. SSC-13, no. 5, pp. 703-708, Oct. 1978.
35. R. Rios, N. D. Arora, and C.-L. Huang, "An analytical polysilicon depletion effect for MOSFETs," IEEE Electron Device Lett., vol. 15, no. 4, pp. 129-131, Apr. 1994.
36. N. D. Arora, R. Rios, and C.-L. Huang, "Modeling the polysilicon depletion effect and its impact on submicrometer CMOS circuit performance," IEEE Trans. Electron Devices, vol. 42, no. 5, pp. 935-943, May 1995.
37. G. Gildenblat, T.-L. Chen, and P. Bendix, "Analytical approximation for the perturbation of MOSFET surface potential by polysilicon depletion layer," Electron. Lett., vol. 35, no. 22, pp. 1974-1976, Oct. 1999.
38. _, "Polysilicon depletion effect within a context of a surfacepotential-based compact MOSFET model," in Proc. Int. Device Res. Symp., 1999, p. 231.
39. J.-M. Sallese, M. Bucher, and C. Lallement, "Improved analytical modeling of polysilicon depletion in MOSFETs for circuit simulation," Solid State Electron., vol. 44, no. 6, pp. 905-912, Jun. 2000.
40. A. J. Scholten, R. van Langevelde, L. F. Tiemeijer, R. J. Havens, and D. B. M. Klaassen, "Compact MOS modelling for RF CMOS circuit simulation," in Proc. SISPAD, 2001, pp. 194-201.