Low-frequency noise behavior of SiO2-HfO2 dual-layer gate dielectric nMOSFETs with different interfacial oxide thickness

IEEE Transactions on Electron Devices

Volumn 51, Issue 5, 2004, Pages 780-784

  Simoen, Eddy ^a   Mercha, A ^a   Pantisano, L ^a   Claeys, Cor ^a,b   Young, E ^c  

^a IMEC   (Belgium)

^b UNIVERSITY OF LEUVEN   (Belgium)

^c NXP SEMICONDUCTORS   (Netherlands)

Author keywords

Charge trapping; HfO2; High gate dielectric; Low frequency noise

Indexed keywords

CHEMICAL VAPOR DEPOSITION; CRYSTAL DEFECTS; DIELECTRIC MATERIALS; ELECTRIC POTENTIAL; ELECTRON TUNNELING; GATES (TRANSISTOR); HAFNIUM COMPOUNDS; INTERFACES (MATERIALS); OXIDES; POLYSILICON; SILICA; SPURIOUS SIGNAL NOISE;

ATOMIC LAYER CHEMICAL VAPOR DEPOSITION; CHARGE TRAPPING; DUAL LAYER GATE DIELECTRIC; INTERFACIAL OXIDE;

MOSFET DEVICES;

EID: 2442628402     PISSN: 00189383     EISSN: None     Source Type: Journal    
DOI: 10.1109/TED.2004.826877     Document Type: Article

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