Minimization of the MuGFET contact resistance by integration of NiSi contacts on epitaxially raised source/drain regions

Proceedings of ESSDERC 2005: 35th European Solid-State Device Research Conference

Volumn 2005, Issue , 2005, Pages 445-448

  Dixit, A ^a,b   Anil, K G ^a   Rooyackers, R ^a   Leys, F ^a   Kaiser, M ^c   Weemaes, R ^c   Ferain, I ^a,b   De Keersgieter, A ^a   Collaert, N ^a   Surdeanu, R ^c   Goodwin, M ^d,e   Zimmerman, P ^e,f   Loo, R ^a   Caymax, M ^a   Jurczak, M ^a   Biesemans, S ^a   De Meyer, K ^a,b  

^a IMEC   (Belgium)

^b UNIVERSITY OF LEUVEN   (Belgium)

^c PHILIPS RESEARCH LABORATORIES   (Netherlands)

^d TEXAS INSTRUMENTS   (United States)

^e IMEC   (Belgium)

^f INTEL CORPORATION   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

CMOS INTEGRATED CIRCUITS; ELECTRIC RESISTANCE; EPITAXIAL GROWTH; NICKEL COMPOUNDS;

CONTACT RESISTANCE; GATE DEVICES; SOURCE/DRAIN REGIONS;

GATES (TRANSISTOR);

EID: 33751429929     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ESSDER.2005.1546680     Document Type: Conference Paper

References (11)

1. B. Yu et al., IEDM Digest, pp. 251-254, 2002.
2. W. Xiong et al., IEEE Electron Device Lett., 25(8), pp. 541-543, 2004.
3. N. Collaert et al., IEEE Electron Device Lett., 25(8), pp. 568-570, 2004.
4. A. Nackaerts et al., IEDM Digest, pp. 269-272, 2004.
5. D. A. Antoniadis, Symp. VLSI Tech., pp. 2-5, 2002.
6. A. Dixit et al., to be published in IEEE Trans. Electron Devices, 2005.
7. J. Kedzierski et al., IEEE Trans. Electron Devices, 50 (4), pp. 952-958, 2003.
8. th ULIS Conf. 2005, April 7-8, pp. 27-30, 2005.
9. ISE-TCAD, Release 9.0, User's Manual
10. F. -L. Yang, IEDM Digest, pp. 255-258, 2002.
11. Morimoto et al., IEEE Trans. Electron Devices, 42(5), pp. 915-922, 1995.