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Dec.
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B. Kaczer, R. Degraeve, G. Groeseneken, M. Rasras, S. Kubicek, E. Vandamme, and G. Badenes, "Impact of MOSFET oxide breakdown on digital circuit operation and reliability," in IEDM Tech Dig., Dec. 2000, pp. 553-556.
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Ultra thin gate dielectrics: They break down, but do they fail?
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B. E. Weir, P. J. Silverman, D. Monroe, K.S. Krisch, M. A. Alam, G. B. Alers, T. W. Sorsch, G. L. Timp, F. Baumann, C.T. Liu, Y. Ma, and D. Hwang, "Ultra thin gate dielectrics: they break down, but do they fail?," in IEDM Tech Dig., Dec. 1997, pp. 73-76.
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5
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The impact of gate oxide breakdown on SRAM stability
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R. Rodríguez, J. H. Stathis, B. P. Linder, S. Kowalczyk, C.T. Chuang, R. V. Joshi, G. Northrop, K. Bernstein, A. J. Bhavnagarwala, and S. Lombarde, "The impact of gate oxide breakdown on SRAM stability", Electron Dev. Lett. vol. 23, no. 9, pp. 559-561, 2002.
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Wear-out breakdown occurrence and failure detection in 18-25 A ultra-thin oxides
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July
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F. Monsieur, E. Vincent, G. Pananakakis, and G. Ghibaudo, "Wear-out breakdown occurrence and failure detection in 18-25 A ultra-thin oxides," Microelectronics Reliability, vol. 41, no.7, pp. 1035-1039, July, 2001.
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The gate oxide lifetime limited by 'B-mode' stress induced leakage current and the scaling limit of silicon dioxides in the direct tunneling regime
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May
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K. Okada, "The gate oxide lifetime limited by 'B-mode' stress induced leakage current and the scaling limit of silicon dioxides in the direct tunneling regime.", Semiconductor Science and Technology, vol. 15, no. 5, pp. 478-484, May, 2000.
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T. Pompl, C. Engel, H. Wurzer, and M. Kerber, "Soft breakdown and hard breakdown in ultra-thin oxides," Microelectronics Reliability, vol. 41, no.4, pp. 543-551, April, 2001.
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June
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B. P. Linder, J. H. Stathis, R. A. Wachnik, E. Wu, S. A. Cohen, A. Ray, and A. Vayshenker, "Gate oxide breakdown under Current Limited Constant Voltage Stress," in Proceedings of VLSI Technology Symp., June 2000, pp. 214-215.
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10
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June
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B. P. Linder, D. J. Frank, J. H. Stathis, and S. A. Cohen, "Transistor limited constant voltage stress of gate dielectrics," in Proceedings of VLSI Technology Symp., June 2001, pp. 93-94.
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Reduction of thermal damage in ultrathin gate oxides after intrinsic dielectric breakdown
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S. Lombardo, A. La Magna, I. Crupi, C. Gerardi, and F. Crupi, "Reduction of thermal damage in ultrathin gate oxides after intrinsic dielectric breakdown," Applied Physics Letters, vol. 79, no. 10, pp. 1522-4, Sept. 3,2001.
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New dielectric breakdown model of local wearout in ultra thin silicon dioxides
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K. Okada and S. Kawasaki, "New Dielectric Breakdown Model of Local Wearout in Ultra Thin Silicon Dioxides," in Proceedings of VLSI Technology Symp., June 1997, pp. 143-144.
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