Negative bias temperature instability in SOI and body-tied double-gate FinFETs

Digest of Technical Papers - Symposium on VLSI Technology

Volumn 2005, Issue , 2005, Pages 110-111

  Lee, Hyunjin ^a   Lee, Choong Ho ^b   Park, Donggun ^b   Choi, Yang Kyu ^a  

^a Korea Advanced Institute of Science and Technology (KAIST)   (South Korea)

^b SAMSUNG Electronics   (South Korea)

Author keywords

[No Author keywords available]

Indexed keywords

CHARGE CARRIERS; ELECTRIC POTENTIAL; GATES (TRANSISTOR); SILICON ON INSULATOR TECHNOLOGY; STRESSES; THERMODYNAMIC STABILITY;

HCI STRESS; HOT-CARRIER INJECTION (HCI); NEGATIVE BIAS TEMPERATURE INSTABILITY (NBTI); SOI FINFET;

FIELD EFFECT TRANSISTORS;

EID: 33745172498     PISSN: 07431562     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/.2005.1469232     Document Type: Conference Paper

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