Total ionizing dose effects on triple-gate FETs

IEEE Transactions on Nuclear Science

Volumn 53, Issue 6, 2006, Pages 3158-3165

  Gaillardin, M ^a,b   Paillet, P ^a,c   Ferlet Cavrois, V ^a,c   Faynot, O ^d   Jahan, C ^d   Cristoloveanu, S ^a,b  

^a IEEE   (France)

^b MINATEC   (France)

^c CEA DIF   (France)

^d CEA LETI   (France)

Author keywords

Fully depleted; Multiple gate transistors; Non planar architectures; Silicon on insulator (SOI); Total ionizing dose tolerance

Indexed keywords

ELECTROSTATIC POTENTIAL; IONIZING DOSE EFFECTS; NONPLANAR DEVICES; NONPLANAR TRIPLE-GATE TRANSISTORS;

COMPUTER SIMULATION; DOSIMETRY; IONIZING RADIATION; RADIATION EFFECTS; SILICON ON INSULATOR TECHNOLOGY;

BIPOLAR TRANSISTORS;

EID: 33846327911     PISSN: 00189499     EISSN: None     Source Type: Journal    
DOI: 10.1109/TNS.2006.884351     Document Type: Conference Paper

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