HotSpot: A compact thermal modeling methodology for early-stage VLSI design

IEEE Transactions on Very Large Scale Integration (VLSI) Systems

Volumn 14, Issue 5, 2006, Pages 501-513

  Huang, Wei ^a,b   Ghosh, Shougata ^b,c   Velusamy, Siva ^b,d   Sankaranarayanan, Karthik ^e   Skadron, Kevin ^a,e   Stan, Mircea R ^a,b  

^a IEEE   (United States)

^b UNIVERSITY OF VIRGINIA   (United States)

^c Princeton University   (United States)

^d XILINX INC   (United States)

^e University of Virginia   (United States)

Author keywords

Compact thermal model; Early design stages; Interconnect self heating; Temperature; VLSI

Indexed keywords

COMPACT THERMAL MODELS; EARLY DESIGN STAGES; INTERCONNECT SELF HEATING;

INTEGRATED CIRCUIT LAYOUT; INTERCONNECTION NETWORKS; LARGE SCALE SYSTEMS; MATHEMATICAL MODELS; SILICON; THERMAL EFFECTS;

VLSI CIRCUITS;

EID: 33746400169     PISSN: 10638210     EISSN: None     Source Type: Journal    
DOI: 10.1109/TVLSI.2006.876103     Document Type: Article

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