MMP: A novel placement algorithm for combined macro block and standard cell layout design

Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC

Volumn , Issue , 2000, Pages 271-276

  Yu, Hong ^a   Hong, Xianlong ^a   Cai, Yici ^a  

^a TSINGHUA UNIVERSITY   (China)

Author keywords

Clustering; Mixed Mode; Partitioning; Quadratic Placement

Indexed keywords

CLUSTERING; MIXED MODE; MIXED MODE PLACEMENT; PARTITIONING; PARTITIONING STRATEGIES; PLACEMENT ALGORITHM; QUADRATIC PLACEMENT; STANDARD CELL DESIGN;

ALGORITHMS; COMPUTER AIDED DESIGN; ELECTRIC BATTERIES;

ULSI CIRCUITS;

EID: 0001679368     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1145/368434.368632     Document Type: Conference Paper

References (19)

1. L. Sha & T. Blank, "ATLAS: A technique for layout using analytic shapes", Proc. International Conf. On Computer Aided Design, pp. 602-607, 1985.
2. A. Alon & U. Ascher, "Model and solution strategy for placement of rectangular blocks in the Euclidead plane", IEEE Trans. CAD Vol 7, pp. 378-386, 1988. (Pubitemid 18596826)
3. C. S. Ying & J. S. L. Wong, "An analytic approach to floorplanning for hierarchical building block layout", IEEE Trans. Computer Aided Design, Vol. 8, pp. 403-412, 1989.
4. B.W.Kemighan,S.Lin, "An Efficient Heuristic Procedure for Partitioning Graphs", Bell System Technical Journal, Vol.49 , P.291-307, Feb. 1970.
5. C.M.Fiduccia and R.M.Mattheyses, "A linear-time heuristic for improving network partitions", ACM/IEEE Proc. 19th DAC , pp. 175-181, 1982.
6. S. Kirkpatric, C. Gelatt, and M. Vecchi, "Optimization by simulated annealing", Science, vol. 220, pp. 671-680, May 1983.
7. C. Sechen and A. Sangiovanni-Vincentelli, "The timberwolf placement and routing package", IEEE Trans. Computer-Aided Design, vol. 20, no.2, pp. 510-522, April 1985. (Pubitemid 16463455)
8. W. J. Sun and C. Sechen, "Efficient and Effective Placement for Very Large Circuits", Proc. Int. Conf. On CAD, 1990, pp. 336-339.
9. Tianming. Kong , Xianlong. Hong and Changge Qiao, "VEAP: A Global Optimization Based Placement Algorithm for Standard Cell Design", ASP-DAC'97, Japan, 1997,1.
10. Xianlong Hong, Hong Yu, Changge. Qiao, Yici Cai, "CASH: A novel quadratic placement algorithm for very large standard cell layout design based on clustering", Proceedings of the 5th International Conference on Solid-State and Integrated Circuit Technology, 1998, pp. 496-501.
11. nd ACM / IEEE Design Automation Conference, pp. 603-608.
12. th ACM / IEEE Design Automation Conference, pp. 376-381.
13. Arun Shanbhag, SrinivasaRao Danda and Naveed Sherwani, "Floorplanning for Mixed Macro Block and Standard Cell Designs", Proc. The Conference of Great-Lake, 1994.
14. Jitendra Apte, Gershon Kedem, "Heuristic Algorithms for Combined Standard Cell and macro Block Layouts", Proc. Of the Sixth MITConf. On Advanced Research in VLSI, 1990, pp. 367-385.
15. T. Lengauer, "Combinatorial Algorithms for Integrated Circuit Layout", John Wiley & Sons, Chichester, 1990.
16. Y.C. Wei and C.K. Cheng. "Towards Efficient Hierarchical Designs by Ratio Cut Partitioning". In Proc. IEEE Intl. Conf. On Computer-Aided Design, pages 298-301,1989.
17. E.L. Lawler, "Combinatorial Optimization: Networks and Matroids", New York : Holt, Rinehert and Winston, 1976.
18. J. Cong and M. Smith, "A Parallel Bottom-up Clustering Algorithm with Applications to Circuit Partitioning in VLSI Design", 30th ACM/IEEE Design Automation Conference, 1993, pp. 755-760.
19. L. Hagen and A. Kahng, "Fast Spectral Methods for Ratio Cut Partitioning and Clustering", Proc. IEEE Int. Conf. on Computer-Aided Design, 1991, pp. 10-13.