A three-dimensional stacked Fin-CMOS technology for high-density ULSI circuits

IEEE Transactions on Electron Devices

Volumn 52, Issue 9, 2005, Pages 1998-2003

  Wu, Xusheng ^a   Chan, Philip C H ^a   Zhang, Shengdong ^b   Feng, Chuguang ^a   Chan, Mansun ^a  

^a HONG KONG UNIVERSITY OF SCIENCE AND TECHNOLOGY   (Hong Kong)

^b PEKING UNIVERSITY   (China)

Author keywords

CMOSFET; FinFET; Silicon on insulator (SOI); Three dimensional integrated circuits (3 D IC)

Indexed keywords

CMOS INTEGRATED CIRCUITS; SEMICONDUCTOR DEVICE MANUFACTURE; SEMICONDUCTOR DEVICE MODELS; SEMICONDUCTOR DEVICE STRUCTURES; SILICON ON INSULATOR TECHNOLOGY; SILICON WAFERS; THREE DIMENSIONAL; WSI CIRCUITS;

OXIDE ISOLATION LAYER; SILICON FILMS; THREE-DIMENSIONAL INTEGRATED CIRCUITS;

ULSI CIRCUITS;

EID: 26244445780     PISSN: 00189383     EISSN: None     Source Type: Journal    
DOI: 10.1109/TED.2005.854267     Document Type: Article

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