SCOPUS 정보 검색 플랫폼

IEEE Transactions on Electron Devices

Volumn 48, Issue 7, 2001, Pages 1394-1399

Three-dimensional CMOS SOI integrated circuit using high-temperature metal-induced lateral crystallization

(3) Chan, Victor W C a,b Chan, Philip C H a,b Chan, Mansun a,b

a IEEE (Hong Kong)

b HONG KONG UNIVERSITY OF SCIENCE AND TECHNOLOGY (Hong Kong)

Author keywords

3 D integrated circuits; Metal induced lateral crystallization; SOI; Thin film transistors

Indexed keywords

METAL-INDUCED LATERAL CRYSTALLIZATION (MILC);

AMORPHOUS SILICON; CAPACITANCE; EPITAXIAL GROWTH; FABRICATION; GRAIN SIZE AND SHAPE; OSCILLATORS (ELECTRONIC); SILICON ON INSULATOR TECHNOLOGY; THIN FILM TRANSISTORS;

CMOS INTEGRATED CIRCUITS;

EID: 0035395689 PISSN: 00189383 EISSN: None Source Type: Journal
DOI: 10.1109/16.930657 Document Type: Article

Times cited : (33)

References (9)

1
- 0022887691
- Three dimensional IC trends
- Dec.
- (1986) Proc. IEEE , vol.14 , pp. 1703-1714
- Akasaki¹

2
- 0033324550
- Architecture and performance of three-dimensional SOI circuits
- Oct.
- (1999) Proc. 1999 IEEE SOI Conf. , pp. 44-45
- Zhang, R.¹ Roy, K.² Janes, D.B.³

3
- 0033311528
- Advanced microelectronics: The role of SOI
- Oct.
- (1999) Proc. 1999 IEEE SOI Conf. , pp. 5-7
- Radack, D.J.¹

4
- 0032311572
- Multiple layers of silicon-on-insulator (MLSOI) islands fabrication process and fully-depleted SOI PMOSFET's
- Oct.
- (1999) Proc. 1999 IEEE SOI Conf. , pp. 15-16
- Pae, S.¹ Su, T.² Denton, J.P.³ Neudeck, G.W.⁴ Stout, J.C.⁵ Janes, D.B.⁶

5
- 0004572820
- Designing with 3D SOI CMOS
- (1997) Electrochemical Soc. Proc. , vol.97 , Issue.23 , pp. 384-388
- Abou-Samra, S.J.¹ Dudek, V.² Ayache, F.³ Guyot, A.⁴ Courtois, B.⁵ Hoefflinger, B.⁶

6
- 0033347794
- Novel 3-D structures
- Oct.
- (1999) Proc. 1999 IEEE SOI Conf. , pp. 54-55
- Saraswat, K.C.¹ Souri, S.J.² Subramanian, V.³ Joshi, A.R.⁴ Wang, A.W.⁵

7
- 0032163137
- High performance germanium-seeded laterally crystallized TFT's for vertical device integration
- Sept.
- (1998) IEEE Trans. Electron Devices , vol.45 , pp. 1934-1939
- Subramanian, V.¹ Saraswat, K.²

8
- 0034250381
- Super thin-film transistor with SOI CMOS performance formed by a novel grain enhancement method
- Aug.
- (2000) IEEE Trans. Electron Devices , vol.47 , pp. 1580-1586
- Wang, H.¹ Chan, M.² Jagar, S.³ Poon, V.M.C.⁴ Qin, M.⁵ Wang, Y.⁶ Ko, P.K.⁷

9
- 0003400983
- Reading, MA: Addison-Wesley
- (1993) Principles of CMOS Design, a Systems Perspective, 2nd ed. , pp. 235
- Weste, N.H.E.¹ Eshraghiam, K.²

* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.