On-state drain current modeling of large-grain poly-si TFTs based on carrier transport through latitudinal and longitudinal grain boundaries

IEEE Transactions on Electron Devices

Volumn 52, Issue 8, 2005, Pages 1727-1733

  Hatzopoulos, Argyrios T ^a   Tassis, Dimitrios H ^a   Hastas, Nikolaos A ^a   Dimitriadis, Charalabos A ^a   Kamarinos, George ^b  

^a ARISTOTLE UNIVERSITY OF THESSALONIKI   (Greece)

^b IMEP LAHC   (France)

Author keywords

Grain boundaries; Modeling; On state current; Polycrystalline silicon thin film transistors (polysilicon TFTs)

Indexed keywords

CARRIER MOBILITY; ELECTRIC CURRENTS; ELECTRIC POTENTIAL; GRAIN BOUNDARIES; MATHEMATICAL MODELS; POLYSILICON;

DRAIN CURRENT; ON STATE CURRENT; POLYCRYSTALLINE SILICON THIN FILM TRANSISTORS;

THIN FILM TRANSISTORS;

EID: 23344433693     PISSN: 00189383     EISSN: None     Source Type: Journal    
DOI: 10.1109/TED.2005.852732     Document Type: Article

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