Interconnect testing in cluster-based FPGA architectures

Proceedings - Design Automation Conference

Volumn , Issue , 2000, Pages 49-54

  Harris, Ian G ^a   Tessier, Russell ^a  

^a UNIVERSITY OF MASSACHUSETTS   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

BUILT-IN SELF TEST; CONTROLLABILITY; FAILURE ANALYSIS; FLIP FLOP CIRCUITS; INTEGRATED CIRCUIT TESTING; MULTIPLEXING EQUIPMENT; OBSERVABILITY; TABLE LOOKUP;

CLUSTER BASED FIELD PROGRAMMABLE GATE ARRAYS; COARSE GRAINED LOGIC BLOCK; HIERARCHICAL TEST; INTERCONNECT TESTING;

FIELD PROGRAMMABLE GATE ARRAYS;

EID: 0033683769     PISSN: 0738100X     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1145/337292.337310     Document Type: Conference Paper

References (17)