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Volumn , Issue , 2002, Pages 131-134

BIST-based delay-fault testing in FPGAs

Author keywords

[No Author keywords available]

Indexed keywords

BUILT-IN SELF TEST;

EID: 84962651712     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/OLT.2002.1030195     Document Type: Conference Paper
Times cited : (38)

References (18)
  • 1
    • 0033335486 scopus 로고    scopus 로고
    • Using Roving STARs for On-Line Testing and Diagnosis of FPGAs in Fault-Tolerant Applications
    • M. Abramovici, C. Stroud, S. Wijesuriya, C. Hamilton, and V. Verma, "Using Roving STARs for On-Line Testing and Diagnosis of FPGAs in Fault-Tolerant Applications," Proc. Intn'l. Test Conf., pp. 973-982, 1999
    • (1999) Proc. Intn'l. Test Conf. , pp. 973-982
    • Abramovici, M.1    Stroud, C.2    Wijesuriya, S.3    Hamilton, C.4    Verma, V.5
  • 3
    • 84952881229 scopus 로고    scopus 로고
    • Roving STARs: An Integrated Approach to On-Line Testing, Diagnosis, and Fault Tolerance for FPGAs in Adaptive Computing Systems
    • M. Abramovici, J. Emmert, and C. Stroud, "Roving STARs: An Integrated Approach to On-Line Testing, Diagnosis, and Fault Tolerance for FPGAs in Adaptive Computing Systems," Proc. Third NASA/DoD Workshop on Evolvable Hardware, pp. 73-92, 2001
    • (2001) Proc. Third NASA/DoD Workshop on Evolvable Hardware , pp. 73-92
    • Abramovici, M.1    Emmert, J.2    Stroud, C.3
  • 4
    • 0035242889 scopus 로고    scopus 로고
    • BIST-Based Test and Diagnosis of FPGA Logic Blocks
    • Feb.
    • M. Abramovici and C. Stroud, "BIST-Based Test and Diagnosis of FPGA Logic Blocks," IEEE Trans. on VLSI, Vol. 9, No. 1, pp. 159-172, Feb., 2001.
    • (2001) IEEE Trans. on VLSI , vol.9 , Issue.1 , pp. 159-172
    • Abramovici, M.1    Stroud, C.2
  • 8
    • 0142194952 scopus 로고    scopus 로고
    • Testing FPGA Delay Faults in the System Environment is very Different from Ordinary Delay Fault Testing
    • A. Krasniewski, "Testing FPGA Delay Faults in the System Environment is very Different from Ordinary Delay Fault Testing," Proc. IEEE Intn'l On-Line Test Workshop, pp. 37-40, 2001
    • (2001) Proc. IEEE Intn'l On-Line Test Workshop , pp. 37-40
    • Krasniewski, A.1
  • 9
    • 0021444275 scopus 로고
    • Verification Testing - A Pseudoexhaustive Test Technique
    • June
    • E. McCluskey, "Verification Testing - A Pseudoexhaustive Test Technique," IEEE Trans. on Computers, Vol. C-33, No. 6, pp. 541-546, June, 1984.
    • (1984) IEEE Trans. on Computers , vol.C-33 , Issue.6 , pp. 541-546
    • McCluskey, E.1
  • 11
    • 0029700620 scopus 로고    scopus 로고
    • Built-In Self-Test for Programmable Logic Blocks in FPGAs (Finally, A Free Lunch: BIST Without Overhead!)
    • C. Stroud, S. Konala, P. Chen, and M. Abramovici, "Built-In Self-Test for Programmable Logic Blocks in FPGAs (Finally, A Free Lunch: BIST Without Overhead!)", Proc. IEEE VLSI Test Symp., pp. 387-392, 1996
    • (1996) Proc. IEEE VLSI Test Symp. , pp. 387-392
    • Stroud, C.1    Konala, S.2    Chen, P.3    Abramovici, M.4
  • 16
    • 28344453981 scopus 로고
    • Standard Test Access Port and Boundary-Scan Architecture
    • "Standard Test Access Port and Boundary-Scan Architecture," IEEE Standard P1149.1, 1990
    • (1990) IEEE Standard P1149.1
  • 17
    • 84962631992 scopus 로고    scopus 로고
    • Lattice Semiconductor Co., http://www.latticesemi.com/products/fpga
  • 18
    • 84962733010 scopus 로고    scopus 로고
    • Xilinx, Inc., http://www.xilinx.com/products


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.