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Volumn , Issue 8 JUL, 2014, Pages

Configurable analog-digital conversion using the neural engineering framework

Author keywords

ADC with signal processing; Multiple input ADC; Neural engineering framework; Neural network analog digital converter

Indexed keywords

ANALOG DIGITAL CONVERTER; ARTICLE; CELL ENGINEERING; COMPUTER; COMPUTER SIMULATION; CONTROLLED STUDY; NERVE CELL; TUNING CURVE;

EID: 84905924156     PISSN: 16624548     EISSN: 1662453X     Source Type: Journal    
DOI: 10.3389/fnins.2014.00201     Document Type: Article
Times cited : (9)

References (51)
  • 1
    • 34548821852 scopus 로고    scopus 로고
    • Synaptic dynamics in analog VLSI
    • doi: 10.1162/neco.2007.19.10.2581
    • Bartolozzi, C., and Indiveri, G. (2007). Synaptic dynamics in analog VLSI. Neural Comput. 19, 2581-2603. doi: 10.1162/neco.2007.19.10.2581
    • (2007) Neural Comput. , vol.19 , pp. 2581-2603
    • Bartolozzi, C.1    Indiveri, G.2
  • 2
    • 85091477925 scopus 로고    scopus 로고
    • Simultaneous unsupervised and supervised learning of cognitive functions in biologically plausible spiking neural networks
    • Bekolay, T., Kolbeck, C., and Eliasmith, C. (2013). "Simultaneous unsupervised and supervised learning of cognitive functions in biologically plausible spiking neural networks," in Proceedings of the 35th Annual Conference of the Cognitive Science Society(Berlin), 169-174. Available online at: http://mindmodeling.org/cogsci2013/papers/0058/paper0058.pdf
    • (2013) Proceedings of the 35th Annual Conference of the Cognitive Science Society (Berlin) , pp. 169-174
    • Bekolay, T.1    Kolbeck, C.2    Eliasmith, C.3
  • 3
  • 4
    • 0029373050 scopus 로고
    • On neural networks for analog to digital conversion
    • doi: 10.1109/72.410371
    • Chande, V., and Poonacha, P. G. (1995). On neural networks for analog to digital conversion. IEEE Trans. Neural Netw. 6, 1269-1274. doi: 10.1109/72.410371
    • (1995) IEEE Trans. Neural Netw. , vol.6 , pp. 1269-1274
    • Chande, V.1    Poonacha, P.G.2
  • 7
    • 84878273159 scopus 로고    scopus 로고
    • Design and validation of a real-time spiking-neural-network decoder for brain-machine interfaces
    • doi:10.1088/1741-2560/10/3/036008
    • Dethier, J., Nuyujukian, P., Ryu, S. I., Shenoy, K. V., and Boahen, K. (2013). Design and validation of a real-time spiking-neural-network decoder for brain-machine interfaces. J. Neural Eng. 10:036008. doi: 10.1088/1741-2560/10/3/036008
    • (2013) J. Neural Eng , vol.10 , pp. 036008
    • Dethier, J.1    Nuyujukian, P.2    Ryu, S.I.3    Shenoy, K.V.4    Boahen, K.5
  • 8
    • 70350570494 scopus 로고    scopus 로고
    • A novel ADPLL design using successive approximation frequency control
    • doi: 10.1016/j.mejo.2008.12.005
    • Eisenreich, H., Mayr, C., Henker, S., Wickert, M., and Schüffny, R. (2009). A novel ADPLL design using successive approximation frequency control. Elsevier Microelectron. J. 40, 1613-1622. doi: 10.1016/j.mejo.2008.12.005
    • (2009) Elsevier Microelectron. J. , vol.40 , pp. 1613-1622
    • Eisenreich, H.1    Mayr, C.2    Henker, S.3    Wickert, M.4    Schüffny, R.5
  • 9
    • 36148991409 scopus 로고    scopus 로고
    • How to build a brain: from function to implementation
    • doi: 10.1007/s11229-007-9235-0
    • Eliasmith, C. (2007). How to build a brain: from function to implementation. Synthese 159, 373-388. doi: 10.1007/s11229-007-9235-0
    • (2007) Synthese , vol.159 , pp. 373-388
    • Eliasmith, C.1
  • 11
    • 4744351651 scopus 로고    scopus 로고
    • INL and DNL estimation based on noise for ADC test
    • doi: 10.1109/TIM.2004.834096
    • Flores, M., Negreiros, M., Carro, L., and Susin, A. (2004). INL and DNL estimation based on noise for ADC test. Instrum. Meas. IEEE Trans. 53, 1391-1395. doi: 10.1109/TIM.2004.834096
    • (2004) Instrum. Meas. IEEE Trans. , vol.53 , pp. 1391-1395
    • Flores, M.1    Negreiros, M.2    Carro, L.3    Susin, A.4
  • 12
    • 84862187288 scopus 로고    scopus 로고
    • Robust working memory in an asynchronously spiking neural network realized in neuromorphic VLSI
    • doi:10.3389/fnins.2011.00149
    • Giulioni, M., Camilleri, P., Mattia, M., Dante, V., Braun, J., and Del Giudice, P. (2012). Robust working memory in an asynchronously spiking neural network realized in neuromorphic VLSI. Front. Neurosci. 5:149. doi: 10.3389/fnins.2011.00149
    • (2012) Front. Neurosci , vol.5 , pp. 149
    • Giulioni, M.1    Camilleri, P.2    Mattia, M.3    Dante, V.4    Braun, J.5    Del Giudice, P.6
  • 13
    • 84876519987 scopus 로고    scopus 로고
    • A 0.45V 100-channel neural-recording IC with sub- uW/channel consumption in 0.18 um CMOS
    • 2013 IEEE International(San Francisco, CA)
    • Han, D., Zheng, Y., Rajkumar, R., Dawe, G., and Je, M. (2013). "A 0.45V 100-channel neural-recording IC with sub- uW/channel consumption in 0.18 um CMOS," in Solid-State Circuits Conference Digest of Technical Papers (ISSCC), 2013 IEEE International(San Francisco, CA), 290-291.
    • (2013) Solid-State Circuits Conference Digest of Technical Papers (ISSCC) , pp. 290-291
    • Han, D.1    Zheng, Y.2    Rajkumar, R.3    Dawe, G.4    Je, M.5
  • 16
    • 84862980410 scopus 로고    scopus 로고
    • Analysis and design of a high speed continuous-time delta sigma modulator using the assisted opamp technique
    • doi: 10.1109/JSSC.2012.2191210
    • Jain, A., Venkatesan, M., and Pavan, S. (2012). Analysis and design of a high speed continuous-time delta sigma modulator using the assisted opamp technique. Solid State Circ. IEEE J. 47, 1615-1625. doi: 10.1109/JSSC.2012.2191210
    • (2012) Solid State Circ. IEEE J. , vol.47 , pp. 1615-1625
    • Jain, A.1    Venkatesan, M.2    Pavan, S.3
  • 17
    • 79959476869 scopus 로고    scopus 로고
    • Implementing spike-timing-dependent plasticity on spinnaker neuromorphic hardware
    • The 2010 International Joint Conference on IEEE(Barcelona)
    • Jin, X., Rast, A., Galluppi, F., Davies, S., and Furber, S. (2010). "Implementing spike-timing-dependent plasticity on spinnaker neuromorphic hardware," in Neural Networks (IJCNN), The 2010 International Joint Conference on IEEE(Barcelona), 1-8.
    • (2010) Neural Networks (IJCNN) , pp. 1-8
    • Jin, X.1    Rast, A.2    Galluppi, F.3    Davies, S.4    Furber, S.5
  • 18
    • 77951026760 scopus 로고    scopus 로고
    • Nanoscale memristor device as synapse in neuromorphic systems
    • doi: 10.1021/nl904092h
    • Jo, S. H., Chang, T., Ebong, I., Bhadviya, B. B., Mazumder, P., and Lu, W. (2010). Nanoscale memristor device as synapse in neuromorphic systems. Nano Lett. 10, 1297-1301. doi: 10.1021/nl904092h
    • (2010) Nano Lett. , vol.10 , pp. 1297-1301
    • Jo, S.H.1    Chang, T.2    Ebong, I.3    Bhadviya, B.B.4    Mazumder, P.5    Lu, W.6
  • 19
    • 0031647786 scopus 로고    scopus 로고
    • A nyquist-rate delta-sigma A/D converter
    • doi: 10.1109/4.654936
    • King, E., Eshraghi, A., Galton, I., and Fiez, T. (1998). A nyquist-rate delta-sigma A/D converter. Solid State Circ. IEEE J. 33, 45-52. doi: 10.1109/4.654936
    • (1998) Solid State Circ. IEEE J. , vol.33 , pp. 45-52
    • King, E.1    Eshraghi, A.2    Galton, I.3    Fiez, T.4
  • 21
    • 84891132389 scopus 로고    scopus 로고
    • A 105-dB SNDR, 10 kSps multi-level second-order incremental converter with smart-DEM consuming 280 uW and 3.3-V supply
    • doi: 10.1109/ESSCIRC.2013.6649150
    • Liu, Y., Bonizzoni, E., D'Amato, A., and Maloberti, F. (2013). "A 105-dB SNDR, 10 kSps multi-level second-order incremental converter with smart-DEM consuming 280 uW and 3.3-V supply," in ESSCIRC (ESSCIRC), 2013 Proceedings(Bucharest), 371-374. doi: 10.1109/ESSCIRC.2013.6649150
    • (2013) ESSCIRC (ESSCIRC), 2013 Proceedings(Bucharest) , pp. 371-374
    • Liu, Y.1    Bonizzoni, E.2    D'Amato, A.3    Maloberti, F.4
  • 22
    • 79959458867 scopus 로고    scopus 로고
    • A spiking neural network alternative for the analog to digital converter
    • The 2010 International Joint Conference On(Barcelona). doi: 10.1109/IJCNN.2010.5596909
    • Lovelace, J., Rickard, J., and Cios, K. (2010). "A spiking neural network alternative for the analog to digital converter," in Neural Networks (IJCNN), The 2010 International Joint Conference On(Barcelona), 1-8. doi: 10.1109/IJCNN.2010.5596909
    • (2010) Neural Networks (IJCNN) , pp. 1-8
    • Lovelace, J.1    Rickard, J.2    Cios, K.3
  • 27
    • 80355135521 scopus 로고    scopus 로고
    • Rate and pulse based plasticity governed by local synaptic state variables
    • doi:10.3389/fnsyn.2010.00033
    • Mayr, C., and Partzsch, J. (2010). Rate and pulse based plasticity governed by local synaptic state variables. Front. Synaptic. Neurosci. 2:33. doi: 10.3389/fnsyn.2010.00033
    • (2010) Front. Synaptic. Neurosci , vol.2 , pp. 33
    • Mayr, C.1    Partzsch, J.2
  • 28
    • 70350724419 scopus 로고    scopus 로고
    • Transient responses of activity-dependent synapses to modulated pulse trains
    • doi: 10.1016/j.neucom.2009.02.019
    • Mayr, C., Partzsch, J., and Schüffny, R. (2009). Transient responses of activity-dependent synapses to modulated pulse trains. Elsevier Neurocomput. 73, 99-105. doi: 10.1016/j.neucom.2009.02.019
    • (2009) Elsevier Neurocomput. , vol.73 , pp. 99-105
    • Mayr, C.1    Partzsch, J.2    Schüffny, R.3
  • 30
    • 26044434903 scopus 로고    scopus 로고
    • Applying spiking neural nets to noise shaping
    • doi: 10.1093/ietisy/e88-d.8.1885
    • Mayr, C., and Schüffny, R. (2005). Applying spiking neural nets to noise shaping. IEICE Trans. Inf. Syst. E88-D, 1885-1892. doi: 10.1093/ietisy/e88-d.8.1885
    • (2005) IEICE Trans. Inf. Syst. , vol.E88-D , pp. 1885-1892
    • Mayr, C.1    Schüffny, R.2
  • 32
    • 84877760437 scopus 로고    scopus 로고
    • Waveform driven plasticity in BiFeO3 memristive devices: Model and implementation
    • Mayr, C., Stärke, P., Partzsch, J., Cederstroem, L., Schüffny, R., Shuai, Y., et al. (2012). Waveform driven plasticity in BiFeO3 memristive devices: Model and implementation. Adv. Neural Inf. Proc. Syst. 25, 1700-1708. Available online at: http://papers.nips.cc/paper/4595-waveform-driven-plasticity-in-bifeo3-memristive-devices-model-and-implementation.pdf
    • (2012) Adv. Neural Inf. Proc. Syst. , vol.25 , pp. 1700-1708
    • Mayr, C.1    Stärke, P.2    Partzsch, J.3    Cederstroem, L.4    Schüffny, R.5    Shuai, Y.6
  • 33
    • 57849132934 scopus 로고    scopus 로고
    • ADC performance survey 1997-2013
    • (Stanford, CA: Stanford University)
    • Murmann, B. (2013). "ADC performance survey 1997-2013," in Technical Report(Stanford, CA: Stanford University).
    • (2013) Technical Report
    • Murmann, B.1
  • 37
    • 84871756286 scopus 로고    scopus 로고
    • Nonvolatile multilevel resistive switching in Ar+ irradiated BiFeO3 thin films
    • doi: 10.1109/LED.2012.2227666
    • Ou, X., Luo, W., Du, N., Wu, C., Zhang, W., Burger, D., et al. (2013). Nonvolatile multilevel resistive switching in Ar+ irradiated BiFeO3 thin films. IEEE Electr. Device Lett. 34, 54-56. doi: 10.1109/LED.2012.2227666
    • (2013) IEEE Electr. Device Lett. , vol.34 , pp. 54-56
    • Ou, X.1    Luo, W.2    Du, N.3    Wu, C.4    Zhang, W.5    Burger, D.6
  • 38
    • 79955737363 scopus 로고    scopus 로고
    • A 84dB SNDR 100kHz bandwidth low-power single op-amp third-order Delta Sigma modulator consuming 140 uW
    • 2011 IEEE International(San Francisco, CA). doi: 10.1109/ISSCC.2011.5746405
    • Perez, A., Bonizzoni, E., and Maloberti, F. (2011). "A 84dB SNDR 100kHz bandwidth low-power single op-amp third-order Delta Sigma modulator consuming 140 uW," in Solid-State Circuits Conference Digest of Technical Papers (ISSCC), 2011 IEEE International(San Francisco, CA), 478-480. doi: 10.1109/ISSCC.2011.5746405
    • (2011) Solid-State Circuits Conference Digest of Technical Papers (ISSCC) , pp. 478-480
    • Perez, A.1    Bonizzoni, E.2    Maloberti, F.3
  • 39
    • 0742268981 scopus 로고    scopus 로고
    • Threshold voltage mismatch and intra-die leakage current in digital CMOS circuits
    • doi: 10.1109/JSSC.2003.820873
    • Pineda de Gyvez, J., and Tuinhout, H. (2004). Threshold voltage mismatch and intra-die leakage current in digital CMOS circuits. Solid State Circ. IEEE J. 39, 157-168. doi: 10.1109/JSSC.2003.820873
    • (2004) Solid State Circ. IEEE J. , vol.39 , pp. 157-168
    • Pineda de Gyvez, J.1    Tuinhout, H.2
  • 40
    • 0037322713 scopus 로고    scopus 로고
    • On-chip ramp generators for mixed-signal BIST and ADC self-test
    • doi: 10.1109/JSSC.2002.807415
    • Provost, B., and Sanchez-Sinencio, E. (2003). On-chip ramp generators for mixed-signal BIST and ADC self-test. IEEE J. Solid State Circ. 38, 263-273. doi: 10.1109/JSSC.2002.807415
    • (2003) IEEE J. Solid State Circ. , vol.38 , pp. 263-273
    • Provost, B.1    Sanchez-Sinencio, E.2
  • 41
    • 80055001408 scopus 로고    scopus 로고
    • A 32 GBit/s communication SoC for a waferscale neuromorphic system
    • doi: 10.1016/j.vlsi.2011.05.003
    • Scholze, S., Eisenreich, H., Höppner, S., Ellguth, G., Henker, S., Ander, M., et al. (2011). A 32 GBit/s communication SoC for a waferscale neuromorphic system. Integr. VLSI J. 45, 61-75. doi: 10.1016/j.vlsi.2011.05.003
    • (2011) Integr. VLSI J. , vol.45 , pp. 61-75
    • Scholze, S.1    Eisenreich, H.2    Höppner, S.3    Ellguth, G.4    Henker, S.5    Ander, M.6
  • 43
    • 0005146287 scopus 로고    scopus 로고
    • Noise spectrum and signal transmission through a population of spiking neurons
    • doi: 10.1088/0954-898X/10/3/304
    • Spiridon, M., and Gerstner, W. (1999). Noise spectrum and signal transmission through a population of spiking neurons. Network 10, 257-272. doi: 10.1088/0954-898X/10/3/304
    • (1999) Network , vol.10 , pp. 257-272
    • Spiridon, M.1    Gerstner, W.2
  • 44
    • 84862684572 scopus 로고    scopus 로고
    • Python scripting in the Nengo simulator
    • doi:10.3389/neuro.11.007.2009
    • Stewart, T., Tripp, B., and Eliasmith, C. (2009). Python scripting in the Nengo simulator. Front. Neuroinform. 3:9. doi: 10.3389/neuro.11.007.2009
    • (2009) Front. Neuroinform , vol.3 , pp. 9
    • Stewart, T.1    Tripp, B.2    Eliasmith, C.3
  • 45
    • 84866594041 scopus 로고    scopus 로고
    • An asynchronous parallel neuromorphic ADC architecture
    • 2012 IEEE International Symposium on (Seoul). doi: 10.1109/ISCAS.2012.6271783
    • Tapson, J., and van Schaik, A. (2012). "An asynchronous parallel neuromorphic ADC architecture," in Circuits and Systems (ISCAS), 2012 IEEE International Symposium on(Seoul), 2409-2412. doi: 10.1109/ISCAS.2012.6271783
    • (2012) Circuits and Systems (ISCAS) , pp. 2409-2412
    • Tapson, J.1    van Schaik, A.2
  • 47
    • 84905919370 scopus 로고
    • Analog-to-digital converter technology comparison
    • (Philadelphia, PA)
    • Walden, R. H. (1994). "Analog-to-digital converter technology comparison," in Proceeding of the GaAs IC Symposium(Philadelphia, PA), 228-231.
    • (1994) Proceeding of the GaAs IC Symposium , pp. 228-231
    • Walden, R.H.1
  • 48
    • 10444290675 scopus 로고    scopus 로고
    • Analog-to-digital conversion using single-layer integrate-and-fire networks with inhibitory connections
    • doi:10.1155/S1110865704405083
    • Watson, B. C., Shoop, B. L., Ressler, E. K., and Das, P. K. (2004). Analog-to-digital conversion using single-layer integrate-and-fire networks with inhibitory connections. EURASIP J. Adv. Signal Proces. 2004:894284. doi: 10.1155/S1110865704405083
    • (2004) EURASIP J. Adv. Signal Proces , vol.2004 , pp. 894284
    • Watson, B.C.1    Shoop, B.L.2    Ressler, E.K.3    Das, P.K.4
  • 49
    • 80052670549 scopus 로고    scopus 로고
    • Digitally synthesized stochastic flash ADC using only standard digital cells
    • (Honolulu, HI)
    • Weaver, S., Hershberg, B., and Moon, U.-K. (2011). "Digitally synthesized stochastic flash ADC using only standard digital cells," in 2011 Symposium on VLSI Circuits (VLSIC)(Honolulu, HI), 266-267.
    • (2011) 2011 Symposium on VLSI Circuits (VLSIC) , pp. 266-267
    • Weaver, S.1    Hershberg, B.2    Moon, U.-K.3
  • 50
    • 37849186026 scopus 로고    scopus 로고
    • A bio-inspired ultra-energy-efficient analog-to-digital converter for biomedical applications
    • doi: 10.1109/TCSI.2006.884463
    • Yang, H., and Sarpeshkar, R. (2006). A bio-inspired ultra-energy-efficient analog-to-digital converter for biomedical applications. IEEE Trans. Circ. Syst I Reg. Pap. 53, 2349-2356. doi: 10.1109/TCSI.2006.884463
    • (2006) IEEE Trans. Circ. Syst I Reg. Pap. , vol.53 , pp. 2349-2356
    • Yang, H.1    Sarpeshkar, R.2
  • 51
    • 79955718294 scopus 로고    scopus 로고
    • A resolution-reconfigurable 5-to-10b 0.4-to-1V power scalable SAR ADC
    • 2011 IEEE International(San Francisco, CA). doi: 10.1109/ISSCC.2011.5746277
    • Yip, M., and Chandrakasan, A. (2011). "A resolution-reconfigurable 5-to-10b 0.4-to-1V power scalable SAR ADC," in Solid-State Circuits Conference Digest of Technical Papers (ISSCC), 2011 IEEE International(San Francisco, CA), 190-192. doi: 10.1109/ISSCC.2011.5746277
    • (2011) Solid-State Circuits Conference Digest of Technical Papers (ISSCC) , pp. 190-192
    • Yip, M.1    Chandrakasan, A.2


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