An asynchronous parallel neuromorphic ADC architecture

ISCAS 2012 - 2012 IEEE International Symposium on Circuits and Systems

Volumn , Issue , 2012, Pages 2409-2412

  Tapson, Jonathan ^a   Van Schaik, Andre ^a  

^a UNIVERSITY OF WESTERN SYDNEY   (Australia)

Author keywords

[No Author keywords available]

Indexed keywords

ASYNCHRONOUS PARALLEL; BASE ELEMENTS; CIRCUIT MISMATCH; INTEGRATE-AND-FIRE NEURONS; LATERAL INHIBITION; NEUROMORPHIC; PARALLEL ADCS; PARALLEL PATHWAYS; PROOF OF CONCEPT;

ANALOG TO DIGITAL CONVERSION;

ELECTRIC NETWORK ANALYSIS;

EID: 84866594041     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ISCAS.2012.6271783     Document Type: Conference Paper

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