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Volumn , Issue , 2013, Pages 371-374

A 105-dB SNDR, 10 kSps multi-level second-order incremental converter with smart-DEM consuming 280 μw and 3.3-V supply

Author keywords

[No Author keywords available]

Indexed keywords

CLOCK PERIOD; CMOS TECHNOLOGY; FIGURE OF MERITS; INPUT STAGES; MISMATCH COMPENSATION; SECOND ORDERS; SINGLE-STEP;

EID: 84891132389     PISSN: 19308833     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ESSCIRC.2013.6649150     Document Type: Conference Paper
Times cited : (21)

References (8)
  • 3
    • 0029532111 scopus 로고
    • Linearity enhancement of multibit A/D and D/A converters using data weighted averaging
    • Dec.
    • R. T. Baird and T. S. Fiez, "Linearity enhancement of multibit A/D and D/A converters using data weighted averaging", IEEE Transactions on Circuits and Systems-II, vol. 42, pp. 753-762, Dec. 1995.
    • (1995) IEEE Transactions on Circuits and Systems-II , vol.42 , pp. 753-762
    • Baird, R.T.1    Fiez, T.S.2
  • 4
    • 84865153273 scopus 로고    scopus 로고
    • High-resolution multibit second-order incremental converter with 1. 5-V residual o-set and 94-dB SFDR
    • Springer, Sept.
    • A. Agnes, E. Bonizzoni, and F. Maloberti, "High-resolution multibit second-order incremental converter with 1. 5-V residual o-set and 94-dB SFDR", Analog Integrated Circuits and Signal Processing, Springer, vol. 72, pp. 531-539, Sept. 2012.
    • (2012) Analog Integrated Circuits and Signal Processing , vol.72 , pp. 531-539
    • Agnes, A.1    Bonizzoni, E.2    Maloberti, F.3
  • 6
    • 0035821957 scopus 로고    scopus 로고
    • Wideband low-distortion delta-sigma adc topology
    • June
    • J. Silva, U. Moon, J. Steensgaard, and G. C. Temes, "Wideband Low-Distortion Delta-Sigma ADC Topology", IET Electronics Letters, Vol. 37, Issue 12, pp. 737-738, June 2001.
    • (2001) IET Electronics Letters , vol.37 , Issue.12 , pp. 737-738
    • Silva, J.1    Moon, U.2    Steensgaard, J.3    Temes, G.C.4
  • 7
    • 70249126615 scopus 로고    scopus 로고
    • The recycling folded cascode: A general enhancement of the folded cascode amplifier
    • Sept.
    • R. S. Assaad and J. Silva-Martinez, "The Recycling Folded Cascode: A General Enhancement of the Folded Cascode Amplifier", IEEE Journal of Solid-State Circuits, Vol. 44, No. 9, pp. 2535-2542, Sept. 2009.
    • (2009) IEEE Journal of Solid-State Circuits , vol.44 , Issue.9 , pp. 2535-2542
    • Assaad, R.S.1    Silva-Martinez, J.2
  • 8
    • 84865498596 scopus 로고    scopus 로고
    • A 88-dB DR, 84-dB SNDR Very Low-Power Single Op-Amp Third-Order Modulator
    • Sept.
    • A. Pena-Perez, E. Bonizzoni, and F. Maloberti, "A 88-dB DR, 84-dB SNDR Very Low-Power Single Op-Amp Third-Order Modulator", IEEE Journal of Solid-State Circuits, Vol. 47, No. 9, pp. 2107-2118, Sept. 2012.
    • (2012) IEEE Journal of Solid-State Circuits , vol.47 , Issue.9 , pp. 2107-2118
    • Pena-Perez, A.1    Bonizzoni, E.2    Maloberti, F.3


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.