Design and evaluation of a 67% area-less 64-bit parallel reconfigurable 6-input nonvolatile logic element using domain-wall motion devices

Japanese Journal of Applied Physics

Volumn 53, Issue 4 SPEC. ISSUE, 2014, Pages

  Suzuki, Daisuke ^a   Natsui, Masanori ^a   Mochizuki, Akira ^a   Hanyu, Takahiro ^a  

^a TOHOKU UNIVERSITY   (Japan)

Author keywords

[No Author keywords available]

Indexed keywords

PHYSICAL PROPERTIES; PHYSICS;

CIRCUIT COMPONENTS; DESIGN AND EVALUATIONS; DOMAIN WALL MOTION; NON-VOLATILE LOGIC; RECONFIGURABLE LOGIC; RESISTANCE VALUES; SEQUENTIAL LOGIC; SIMULATION PROGRAM WITH INTEGRATED CIRCUIT EMPHASIS;

SPICE;

EID: 84903269573     PISSN: 00214922     EISSN: 13474065     Source Type: Journal    
DOI: 10.7567/JJAP.53.04EM03     Document Type: Conference Paper

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