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Volumn E94-C, Issue 4, 2011, Pages 548-556

A genuine power-gatable reconfigurable logic chip with FeRAM cells

Author keywords

FeRAM; Non volatile flipflop; NV FF; Power gating; Reconfigurable logic; VGLC

Indexed keywords

COMPUTER CIRCUITS; EMBEDDED SYSTEMS; FIELD PROGRAMMABLE GATE ARRAYS (FPGA); FLIP FLOP CIRCUITS; LOGIC DEVICES; MICROPROCESSOR CHIPS; PROGRAMMABLE LOGIC CONTROLLERS; RANDOM ACCESS STORAGE; STATIC RANDOM ACCESS STORAGE; SYSTEM-ON-CHIP;

EID: 79953316838     PISSN: 09168524     EISSN: 17451353     Source Type: Journal    
DOI: 10.1587/transele.E94.C.548     Document Type: Article
Times cited : (8)

References (16)
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  • 5
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    • Architecture of field-programmable gate arrays
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    • Delay-oriented technology mapping for heterogeneous FPGAs with bounded resources
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* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.