High-speed simulator including accurate MTJ models for spintronics integrated circuit design

ISCAS 2012 - 2012 IEEE International Symposium on Circuits and Systems

Volumn , Issue , 2012, Pages 1971-1974

  Sakimura, Noboru ^a   Nebashi, Ryusuke ^a   Tsuji, Yukihide ^a   Honjo, Hiroaki ^a   Sugibayashi, Tadahiko ^a   Koike, Hiroki ^b   Ohsawa, Takashi ^b   Fukami, Shunsuke ^b   Hanyu, Takahiro ^b   Ohno, Hideo ^b   Endoh, Tetsuo ^b  

^a NEC CORPORATION   (Japan)

^b TOHOKU UNIVERSITY   (Japan)

Author keywords

[No Author keywords available]

Indexed keywords

CIRCUIT DESIGNS; HIGH-SPEED; INTEGRATED CIRCUIT DESIGNS; LARGE-SCALE CIRCUITS; MACRO MODEL; MAGNETIC TUNNEL JUNCTION; MODEL PARAMETERS; OPERATION MARGIN; SIMULATION PROGRAM WITH INTEGRATED CIRCUITS EMPHASIS; SIMULATION SPEED;

INTEGRATED CIRCUIT MANUFACTURE; MAGNETOELECTRONICS; NANOTECHNOLOGY;

MAGNETIC DEVICES;

EID: 84866627442     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ISCAS.2012.6271663     Document Type: Conference Paper

References (10)

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9. N. D. Rizzo, et al.,"Thermally activated magnetization reversal in submicron magnetic tunnel junctions for magnetoresistive random access memory," Applid Physics Letters, vol. 80, no. 13, April 2002.
10. http://www. nanodesign. co. jp (Japanese version only)