Catnap: Energy proportional multiple network-on-chip

Proceedings - International Symposium on Computer Architecture

Volumn , Issue , 2013, Pages 320-331

  Das, Reetuparna ^a   Narayanasamy, Satish ^a   Satpathy, Sudhir K ^a   Dreslinski, Ronald G ^a  

^a UNIVERSITY OF MICHIGAN   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

DEADLOCK FREEDOM; EFFECTIVE POWER; ENERGY PROPORTIONALITIES; MULTIPLE NETWORKS; NETWORK ON CHIP; PERFORMANCE COSTS; PERFORMANCE LOSS; POWER PERSPECTIVES;

BANDWIDTH; COMPUTER ARCHITECTURE; DESIGN; VLSI CIRCUITS;

ROUTERS;

EID: 84881149454     PISSN: 10636897     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1145/2485922.2485950     Document Type: Conference Paper

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