Design challenges of technology scaling

IEEE Micro

Volumn 19, Issue 4, 1999, Pages 23-29

  Borkar, Shekhar ^a  

^a NONE   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

CAPACITANCE; ELECTRIC FIELD EFFECTS; ELECTRIC POWER SUPPLIES TO APPARATUS; ELECTRIC RESISTANCE; ERROR CORRECTION; GATES (TRANSISTOR); LEAKAGE CURRENTS; LOGIC DESIGN;

GATE DELAY; POWER DENSITY; SUBTHRESHOLD LEAKAGE; TECHNOLOGY SCALING;

MICROPROCESSOR CHIPS;

EID: 0032592096     PISSN: 02721732     EISSN: None     Source Type: Journal    
DOI: 10.1109/40.782564     Document Type: Article

References (3)

1. Intel Corp., http://www.intel.com.
2. R. Gonzalez, B. Gordon, and M. Horowitz, "Supply and Threshold Voltage Scaling for Low-Power CMOS," IEEE J. Solid-State Circuits, Vol. 32, No. 8, Aug. 1997, pp. 1210-1216.
3. M. Bohr et al., Proc. Int'l Electron Devices Meeting, IEEE Electron Device Society, 1996, pp. 843-850.