Warped register file: A power efficient register file for GPGPUs

Proceedings - International Symposium on High-Performance Computer Architecture

Volumn , Issue , 2013, Pages 412-423

  Abdel Majeed, Mohammad ^a   Annavaram, Murali ^a  

^a University of Southern California ^*  (United States)

Author keywords

[No Author keywords available]

Indexed keywords

DYNAMIC POWER CONSUMPTION; GRAPHICS PROCESSING UNIT; LEAKAGE POWER CONSUMPTION; MASSIVE PARALLELISM; PERFORMANCE IMPACT; SOFTWARE EXECUTION; STATIC POWER CONSUMPTION; SUPPLY-VOLTAGE SCALING;

COMPUTER ARCHITECTURE; COMPUTER GRAPHICS; STATIC RANDOM ACCESS STORAGE; SUPERCOMPUTERS; WEAVING;

PROGRAM PROCESSORS;

EID: 84880287859     PISSN: 15300897     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/HPCA.2013.6522337     Document Type: Conference Paper

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