Architectural power models for SRAM and CAM structures based on hybrid analytical/empirical techniques

IEEE/ACM International Conference on Computer-Aided Design, Digest of Technical Papers, ICCAD

Volumn , Issue , 2007, Pages 824-830

  Xiaoyao, Liang ^a   Turgay, Kerem ^a   Brooks, David ^a  

^a HARVARD UNIVERSITY   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

ASSOCIATIVE STORAGE; CAMS; CIRCUIT SIMULATION; DESIGN; MODEL STRUCTURES; PROCESS DESIGN; PROCESS ENGINEERING; STATIC RANDOM ACCESS STORAGE; TECHNOLOGY;

ADVANCED TECHNOLOGIES; ARCHITECTURE DESIGNS; ARRAY STRUCTURES; CAM STRUCTURES; CHIP POWER; CIRCUIT SIMULATIONS; COMPUTER-AIDED DESIGN; DESIGN CONSTRAINTS; DESIGN PROCESSES; EARLY STAGES; HIGH-PERFORMANCE MICROPROCESSORS; INTERNATIONAL CONFERENCES; MEMORY STRUCTURES; ON-CHIP CACHES; POWER ANALYSIS; POWER ESTIMATIONS; POWER MODELING; POWER SIMULATION; UNIFIED ARCHITECTURES;

ARCHITECTURAL DESIGN;

EID: 50249083455     PISSN: 10923152     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ICCAD.2007.4397367     Document Type: Conference Paper

References (11)

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