-
3
-
-
0033740171
-
Point-to-point connectivity between neuromorphic chips using address events
-
Boahen, K.A.: Point-to-point connectivity between neuromorphic chips using address events. IEEE Trans. Circuits Syst. 2 Analog Digit. Signal Process. 47(5), 416-434 (2000)
-
(2000)
IEEE Trans. Circuits Syst. 2 Analog Digit. Signal Process
, vol.47
, Issue.5
, pp. 416-434
-
-
Boahen, K.A.1
-
4
-
-
0030106428
-
An analog VLSI recurrent neural network learning a continuous-time trajectory
-
Cauwenberghs, G.: An analog VLSI recurrent neural network learning a continuous-time trajectory. IEEE Trans. Neural Netw. 7(2), 346-361 (1996)
-
(1996)
IEEE Trans. Neural Netw.
, vol.7
, Issue.2
, pp. 346-361
-
-
Cauwenberghs, G.1
-
5
-
-
0023346637
-
Deadlock-free message routing in multiprocessor interconnection networks
-
Dally, W.J., Seitz, C.L.: Deadlock-free message routing in multiprocessor interconnection networks. IEEE Trans. Comput. C-36(5), 547-553 (1987)
-
(1987)
IEEE Trans. Comput.
, vol.36
, Issue.5
, pp. 547-553
-
-
Dally, W.J.1
Seitz, C.L.2
-
6
-
-
84887302917
-
PyNN: A common interface for neuronal network simulators
-
Davison, A.P., Brüderle, D., Eppler, J., Kremkow, J., Muller, E., Pecevski, D., Perrinet, L., Yger, P.: PyNN: a common interface for neuronal network simulators. Frontiers Neuroinform. 2(11) (2009)
-
(2009)
Frontiers Neuroinform
, vol.2
, Issue.11
-
-
Davison, A.P.1
Brüderle, D.2
Eppler, J.3
Kremkow, J.4
Muller, E.5
Pecevski, D.6
Perrinet, L.7
Yger, P.8
-
7
-
-
0346365195
-
SpikeNET: An event-driven simulation package for modelling large networks of spiking neurons
-
Delorme, A., Thorpe, S.J.: SpikeNET: an event-driven simulation package for modelling large networks of spiking neurons. Network Comput. Neural Syst. 14(4), 613-627 (2003)
-
(2003)
Network Comput. Neural Syst.
, vol.14
, Issue.4
, pp. 613-627
-
-
Delorme, A.1
Thorpe, S.J.2
-
8
-
-
56349143763
-
Realizing biological spiking network models in a configurable wafer-scale hardware system
-
IEEE Press, NJ
-
Fieres, J., Schemmel, J., Meier, K.: Realizing biological spiking network models in a configurable wafer-scale hardware system. In: Proceedings of 2008 International Joint Conference on Neural Networks (IJCNN2008), pp. 969-976. IEEE Press, NJ (2008)
-
(2008)
Proceedings of 2008 International Joint Conference on Neural Networks (IJCNN2008)
, pp. 969-976
-
-
Fieres, J.1
Schemmel, J.2
Meier, K.3
-
9
-
-
0024171008
-
CMOS analog IC implementing the back propagation algorithm
-
Supplement
-
Furman, B., White, J., Abidi, A.A.: CMOS analog IC implementing the back propagation algorithm. Neural Netw. 1(Supplement 1), 381 (1988)
-
(1988)
Neural Netw
, vol.1
, Issue.1
, pp. 381
-
-
Furman, B.1
White, J.2
Abidi, A.A.3
-
10
-
-
78650223866
-
A General-purpose Model Translation System for a Universal Neural Chip
-
Springer, Berlin
-
Galluppi, F., Rast, A., Davies, S., Furber, S.: A General-purpose Model Translation System for a Universal Neural Chip. In: Proceedings of 2010 International Conference on Neural Information Processing (ICONIP 2010). Springer, Berlin (2010)
-
(2010)
Proceedings of 2010 International Conference on Neural Information Processing (ICONIP 2010)
-
-
Galluppi, F.1
Rast, A.2
Davies, S.3
Furber, S.4
-
11
-
-
43949092150
-
NEST (NEural Simulation Tool)
-
Gewaltig, M.O., Diesmann, M.: NEST (NEural Simulation Tool). Scholarpedia 2(4), 1430 (2007)
-
(2007)
Scholarpedia
, vol.2
, Issue.4
, pp. 1430
-
-
Gewaltig, M.O.1
Diesmann, M.2
-
12
-
-
25144452796
-
A novel approach for the implementation of large scale spiking neural networks on FPGA hardware
-
Springer, Berlin
-
Glackin, B., McGinnity, T.M., Maguire, L.P., Wu, Q.X., Belatreche, A.: A novel approach for the implementation of large scale spiking neural networks on FPGA hardware. In: Proceedings of 8th Internatioal Work Conference on Artificial Neural Networks (IWANN 2005), pp. 552-563. Springer, Berlin (2005)
-
(2005)
Proceedings of 8th Internatioal Work Conference on Artificial Neural Networks (IWANN 2005)
, pp. 552-563
-
-
Glackin, B.1
McGinnity, T.M.2
Maguire, L.P.3
Wu, Q.X.4
Belatreche, A.5
-
13
-
-
84885847922
-
Brian: A simulator for spiking neural networks in Python
-
Goodman, D., Brette, R.: Brian: a simulator for spiking neural networks in Python. Frontiers Neuroinform. 2(5) (2008)
-
(2008)
Frontiers Neuroinform
, vol.2
, Issue.5
-
-
Goodman, D.1
Brette, R.2
-
14
-
-
0023591084
-
A CMOS associative memory chip
-
Graf, H.P., Hubbard, W., Jackel, L.D., de Vegvar, P.G.N.: A CMOS Associative Memory Chip. In: Proceedings of IEEE First International Conference on Neural Networks, pp. 461-468 (1987)
-
(1987)
Proceedings of IEEE First International Conference on Neural Networks
, pp. 461-468
-
-
Graf, H.P.1
Hubbard, W.2
Jackel, L.D.3
De Vegvar, P.G.N.4
-
15
-
-
48349097292
-
Mapping the structural core of human cerebral cortex
-
Hagmann, P., Cammoun, L., Gigandet, X.,Meuli, R., Honey, C.J.,Wedeen, V.J., Sporns, O.: Mapping the structural core of human cerebral cortex. PLoS Biology 6(7), 1479-1493 (2008)
-
(2008)
PLoS Biology
, vol.6
, Issue.7
, pp. 1479-1493
-
-
Hagmann, P.1
Cammoun, L.2
Gigandet, X.3
Meuli, R.4
Honey, C.J.5
Wedeen, V.J.6
Sporns, O.7
-
16
-
-
54949132181
-
Reconfigurable platforms and the challenges for large-scale implementations of spiking neural networks
-
Harkin, J., Morgan, F., Hall, S., Dudek, P., Dowrick, T., McDaid, L.: Reconfigurable platforms and the challenges for large-scale implementations of spiking neural networks. In: Proceedings of 2008 International Conference on Field Programmable Logic and Applications (FPL 2008), pp. 483-486 (2008)
-
(2008)
Proceedings of 2008 International Conference on Field Programmable Logic and Applications (FPL 2008)
, pp. 483-486
-
-
Harkin, J.1
Morgan, F.2
Hall, S.3
Dudek, P.4
Dowrick, T.5
McDaid, L.6
-
17
-
-
16244415828
-
A model for representing the dynamics of a system of synfire chains
-
Hayon, G., Abeles, M., Lehmann, D.: A model for representing the dynamics of a system of synfire chains. J. Comput. Sci. 18(1), 41-53 (2005)
-
(2005)
J. Comput. Sci.
, vol.18
, Issue.1
, pp. 41-53
-
-
Hayon, G.1
Abeles, M.2
Lehmann, D.3
-
18
-
-
0031571202
-
The NEURON simulation environment
-
Hines, M.L., Carnevale, N.T.: The NEURON simulation environment. Neural Comput. 9(6), 1179- 1209 (1997)
-
(1997)
Neural Comput
, vol.9
, Issue.6
, pp. 1179-1209
-
-
Hines, M.L.1
Carnevale, N.T.2
-
19
-
-
0024909727
-
An electrically trainable artificial neural network (ETANN) with 10240 "floating Gate" Synapses
-
Holler, M., Tam, S., Castro, H., Benson, R.: An electrically trainable artificial neural network (ETANN) with 10240 "Floating Gate" Synapses. In: Proceedings of 1989 Internatiional Joint Conference on Neural Networks (IJCNN1989), pp. 191-196 (1989)
-
(1989)
Proceedings of 1989 Internatiional Joint Conference on Neural Networks (IJCNN1989)
, pp. 191-196
-
-
Holler, M.1
Tam, S.2
Castro, H.3
Benson, R.4
-
20
-
-
33244465845
-
AVLSI array of low-power spiking neurons and bistable synapses with spike-timing dependent plasticity
-
Indiveri, G., Chicca, E.,Douglas, R.:AVLSI array of low-power spiking neurons and bistable synapses with spike-timing dependent plasticity. IEEE Trans. Neural Netw. 17(1), 211-221 (2006)
-
(2006)
IEEE Trans. Neural Netw.
, vol.17
, Issue.1
, pp. 211-221
-
-
Indiveri, G.1
Chicca, E.2
Douglas, R.3
-
21
-
-
0742268989
-
Simple model of spiking neurons
-
Izhikevich, E.: Simple model of spiking neurons. IEEE Trans. Neural Netw. 14, 1569-1572 (2003)
-
(2003)
IEEE Trans. Neural Netw.
, vol.14
, pp. 1569-1572
-
-
Izhikevich, E.1
-
22
-
-
42149192537
-
Large-scale model of mammalian thalamocortical systems
-
Izhikevich, E., Edelman, G.M.: Large-scale model of mammalian thalamocortical systems. Proc. Natl. Acad. Sci. USA 105(9), 3593-3598 (2008)
-
(2008)
Proc. Natl. Acad. Sci. USA
, vol.105
, Issue.9
, pp. 3593-3598
-
-
Izhikevich, E.1
Edelman, G.M.2
-
23
-
-
4344661328
-
Which model to use for cortical spiking neurons
-
Izhikevich, E.M.: Which model to use for cortical spiking neurons. IEEE Trans. Neural Netw. 15(5), 1063-1070 (2004)
-
(2004)
IEEE Trans. Neural Netw.
, vol.15
, Issue.5
, pp. 1063-1070
-
-
Izhikevich, E.M.1
-
24
-
-
0026828821
-
Design of low-cost, real-time simulation systems for large neural networks
-
James, M., Hoang, D.: Design of low-cost, real-time simulation systems for large neural networks. J. Parallel Distrib. Comput. 14(3), 221-235 (1992)
-
(1992)
J. Parallel Distrib. Comput.
, vol.14
, Issue.3
, pp. 221-235
-
-
James, M.1
Hoang, D.2
-
25
-
-
77954470027
-
Efficient parallel implementation of multilayer backpropagation network on torus-connected CMPs
-
Jin, X., Luján,M., Khan,M.M., Plana, L.A., Rast, A.D.,Welbourne, S.R., Furber, S.B.: Efficient parallel implementation of multilayer backpropagation network on torus-connected CMPs. In: Proceedings of 2010 ACM International Conference on Computing Frontiers (CF'10), pp. 89-90 (2010)
-
(2010)
Proceedings of 2010 ACM International Conference on Computing Frontiers (CF'10)
, pp. 89-90
-
-
Jin, X.1
Lujan, M.2
Khan, M.M.3
Plana, L.A.4
Rast, A.D.5
Welbourne, S.R.6
Furber, S.B.7
-
27
-
-
76649135818
-
Implementing learning on the SpiNNaker universal neural chip multiprocessor
-
Springer, Berlin
-
Jin, X., Rast, A., Galluppi, F., Khan, M.M., Furber, S.: Implementing learning on the SpiNNaker universal neural chip multiprocessor. In: Proceedings of 2009 International Conference on Neural Information Processing (ICONIP 2009). Springer, Berlin (2009)
-
(2009)
Proceedings of 2009 International Conference on Neural Information Processing (ICONIP 2009)
-
-
Jin, X.1
Rast, A.2
Galluppi, F.3
Khan, M.M.4
Furber, S.5
-
28
-
-
33845642736
-
Towards cortex sized artificial neural systems
-
Johansson, C., Lansner, A.: Towards cortex sized artificial neural systems. Neural Netw. 20(1), 48- 61 (2007)
-
(2007)
Neural Netw
, vol.20
, Issue.1
, pp. 48-61
-
-
Johansson, C.1
Lansner, A.2
-
29
-
-
56349083817
-
SpiNNaker: Mapping Neural Networks onto a Massively-Parallel Chip Multiprocessor
-
In
-
Khan,M., Lester, D., Plana, L., Rast, A., Jin, X., Painkras, E., Furber, S.: SpiNNaker: Mapping Neural Networks onto a Massively-Parallel Chip Multiprocessor. In: Proceedings of 2008 International Joint Conference on Neural Networks (IJCNN2008) (2008)
-
(2008)
Proceedings of 2008 International Joint Conference on Neural Networks (IJCNN2008)
-
-
Khan, M.1
Lester, D.2
Plana, L.3
Rast, A.4
Jin, X.5
Painkras, E.6
Furber, S.7
-
30
-
-
0027591331
-
Silicon auditory processors as computer peripherals
-
Lazzaro, J.,Wawrzynek, J., Mahowald, M., Silviotti, M., Gillespie, D.: Silicon auditory processors as computer peripherals. IEEE Trans. Neural Netw. 4(3), 523-528 (1993)
-
(1993)
IEEE Trans. Neural Netw.
, vol.4
, Issue.3
, pp. 523-528
-
-
Lazzaro, J.1
Wawrzynek, J.2
Mahowald, M.3
Silviotti, M.4
Gillespie, D.5
-
31
-
-
0026925756
-
General-purpose neural chips with electrically programmable synapses and gain-adjustable neurons
-
Lee, B.J., Sheu, B.W.: General-purpose neural chips with electrically programmable synapses and gain-adjustable neurons. IEEE J. Solid-State Circuits 27(9), 1299-1302 (1992)
-
(1992)
IEEE J. Solid-State Circuits
, vol.27
, Issue.9
, pp. 1299-1302
-
-
Lee, B.J.1
Sheu, B.W.2
-
32
-
-
55749104361
-
Just-in-Time connectivity for large spiking networks
-
Lytton, W.H., Omurtag, A., Neymotin, S.A., Hines, M.L.: Just-in-Time connectivity for large spiking networks. Neural Comput. 20(11), 2745-2756 (2008)
-
(2008)
Neural Comput
, vol.20
, Issue.11
, pp. 2745-2756
-
-
Lytton, W.H.1
Omurtag, A.2
Neymotin, S.A.3
Hines, M.L.4
-
33
-
-
35649003747
-
Challenges for largescale implementations of spiking neural networks on FPGAs
-
Maguire, L., McGinnity, T.M., Glackin, B., Ghani, A., Belatreche, A., Harkin, J.: Challenges for largescale implementations of spiking neural networks on FPGAs. Neurocomputing 71(1-3), 13-29 (2007)
-
(2007)
Neurocomputing
, vol.71
, Issue.1-3
, pp. 13-29
-
-
Maguire, L.1
McGinnity, T.M.2
Glackin, B.3
Ghani, A.4
Belatreche, A.5
Harkin, J.6
-
34
-
-
0034296490
-
Efficient event-driven simulation of large networks of spiking neurons and dynamical synapses
-
Mattia, M., Guidice, P.D.: Efficient event-driven simulation of large networks of spiking neurons and dynamical synapses. Neural Comput. 12(10), 2305-2329 (2000)
-
(2000)
Neural Comput
, vol.12
, Issue.10
, pp. 2305-2329
-
-
Mattia, M.1
Guidice, P.D.2
-
35
-
-
0242695748
-
Synaptic plasticity in spiking neural networks (SP2INN): A System Approach
-
Mehrtash, N., Jung, D., Hellmich, H., Schönauer, T., Lu, V.T., Klar, H.: Synaptic plasticity in spiking neural networks (SP2INN): a System Approach. IEEE Trans. Neural Netw. 14(5), 980-992 (2003)
-
(2003)
IEEE Trans. Neural Netw.
, vol.14
, Issue.5
, pp. 980-992
-
-
Mehrtash, N.1
Jung, D.2
Hellmich, H.3
Schönauer, T.4
Lu, V.T.5
Klar, H.6
-
36
-
-
33747409485
-
Parallel network simulations with NEURON
-
Migliore, M., Cannia, C., Lytton,W.W., Markram, H., Hines, M.L.: Parallel network simulations with NEURON. J. Comput. Neurosci. 21(2), 119-129 (2006)
-
(2006)
J. Comput. Neurosci.
, vol.21
, Issue.2
, pp. 119-129
-
-
Migliore, M.1
Cannia, C.2
Lytton, W.W.3
Markram, H.4
Hines, M.L.5
-
37
-
-
34047113962
-
Adistributed andmultithreaded neural event driven simulation framework
-
Mouraud, A., Paugam-Moisy, H., Puzenat, D.:Adistributed andmultithreaded neural event driven simulation framework. In: Proceedings of IASTED International Conference on Parallel and Distributed Computing and Networks, pp. 212-217 (2006)
-
(2006)
Proceedings of IASTED International Conference on Parallel and Distributed Computing and Networks
, pp. 212-217
-
-
Mouraud, A.1
Paugam-Moisy, H.2
Puzenat, D.3
-
38
-
-
68149182671
-
A configurable simulation environment for the efficient simulation of large-scale spiking neural networks on graphics processors
-
Nageswaran, J.M., Dutt, N., Krichmar, J.L., Nicolau, A.: A configurable simulation environment for the efficient simulation of large-scale spiking neural networks on graphics processors. Neural Netw. 22(5-6) (2007)
-
(2007)
Neural Netw
, vol.22
, Issue.5-6
-
-
Nageswaran, J.M.1
Dutt, N.2
Krichmar, J.L.3
Nicolau, A.4
-
39
-
-
70449709566
-
Understanding the interconnection network of SpiNNaker
-
Navaridas, J., Luján, M., Miguel-Alonso, J., Plana, L.A., Furber, S.B.: Understanding the interconnection network of SpiNNaker. In: Proceedings of 23rd International Conference on Supercomputing (ICS'09), pp. 286-295 (2009)
-
(2009)
Proceedings of 23rd International Conference on Supercomputing (ICS'09)
, pp. 286-295
-
-
Navaridas, J.1
Luján, M.2
Miguel-Alonso, J.3
Plana, L.A.4
Furber, S.B.5
-
40
-
-
78049382781
-
Simulating and evaluating interconnection networks with INSEE
-
Navaridas, J., Miguel-Alonso, J., Pascual, J.A., Ridruejo, F.J.: Simulating and evaluating interconnection networks with INSEE. Simul. Modell. Pract. Theory 19(1), 494-515 (2011)
-
(2011)
Simul. Modell. Pract. Theory
, vol.19
, Issue.1
, pp. 494-515
-
-
Navaridas, J.1
Miguel-Alonso, J.2
Pascual, J.A.3
Ridruejo, F.J.4
-
41
-
-
77954526785
-
SpiNNaker: Impact of traffic locality, causality and burstiness on the performance of the interconnection Network
-
Navaridas, J., Plana, L.A., Miguel-Alonso, J., Luján, M., Furber, S.B.: SpiNNaker: impact of traffic locality, causality and burstiness on the performance of the interconnection Network. In: Proceedings of 2010 ACM Conference on Computing Frontiers (CF'10), pp. 11-19 (2010)
-
(2010)
Proceedings of 2010 ACM Conference on Computing Frontiers (CF'10)
, pp. 11-19
-
-
Navaridas, J.1
Plana, L.A.2
Miguel-Alonso, J.3
Luján, M.4
Furber, S.B.5
-
42
-
-
84902125180
-
NeuSim: A modular neural networks simulator for Beowulf clusters
-
Part II, Springer, Berlin
-
Orellana, C.G., Caballero, R.G., Velasco, H.M.G., Aligue, F.J.L.: NeuSim: a modular neural networks simulator for Beowulf clusters. In: Proceedings of 6th InternationalWork-Conference on Artifical and Natural Neural Networks (IWANN 2001), Part II, pp. 72-79. Springer, Berlin (2001)
-
(2001)
Proceedings of 6th InternationalWork-Conference on Artifical and Natural Neural Networks (IWANN 2001)
, pp. 72-79
-
-
Orellana, C.G.1
Caballero, R.G.2
Velasco, H.M.G.3
Aligue, F.J.L.4
-
43
-
-
0031141059
-
VLSI implementation of a neural model using spikes
-
Pelayo, F.J.,Ros, E., Arreguit, X., Prieto, A.: VLSI implementation of a neural model using spikes.Analog Integr. Circuits Signal Process. 13(1-2), 111-121 (1997)
-
(1997)
Analog Integr. Circuits Signal Process.
, vol.13
, Issue.1-2
, pp. 111-121
-
-
Pelayo, F.J.1
Ros, E.2
Arreguit, X.3
Prieto, A.4
-
44
-
-
35348906788
-
A GALS infrastructure for a massively parallel multiprocessor
-
Plana, L., Furber, S., Temple, S., Khan, M., Shi, Y., Wu, J., Yang, S.: A GALS infrastructure for a massively parallel multiprocessor. IEEE Design Test Comput. 24(5), 454-463 (2007)
-
(2007)
IEEE Design Test Comput.
, vol.24
, Issue.5
, pp. 454-463
-
-
Plana, L.1
Furber, S.2
Temple, S.3
Khan, M.4
Shi, Y.5
Wu, J.6
Yang, S.7
-
45
-
-
0141811271
-
Implementation of artificial neural networks on a reconfigurable hardware accelerator
-
Porrmann, M., Witkowski, U., Kalte, H., Rückert, U.: Implementation of artificial neural networks on a reconfigurable hardware accelerator. In: Proceedings of 2002 Euromicro Conference on Parallel, Distributed, and Network-based processing, pp. 243-250 (2002)
-
(2002)
Proceedings of 2002 Euromicro Conference on Parallel, Distributed, and Network-based Processing
, pp. 243-250
-
-
Porrmann, M.1
Witkowski, U.2
Kalte, H.3
Rückert, U.4
-
46
-
-
70349100028
-
The deferred event model for hardware-oriented spiking neural networks
-
Springer, Berlin
-
Rast, A., Jin, X., Khan, M., Furber, S.: The deferred event model for hardware-oriented spiking neural networks. In: Proceedings of 2008 International Conference on Neural Information Processing (ICONIP 2008). Springer, Berlin (2009)
-
(2009)
Proceedings of 2008 International Conference on Neural Information Processing (ICONIP 2008)
-
-
Rast, A.1
Jin, X.2
Khan, M.3
Furber, S.4
-
47
-
-
70449394832
-
A universal abstract-time platform for realtime neural networks
-
Rast, A., Khan, M.M., Jin, X., Plana, L.A., Furber, S.: A universal abstract-time platform for realtime neural networks. In: Proceedings of 2009 International Joint Conference on Neural Networks (IJCNN2009), pp. 2611-2618 (2009)
-
(2009)
Proceedings of 2009 International Joint Conference on Neural Networks (IJCNN2009)
, pp. 2611-2618
-
-
Rast, A.1
Khan, M.M.2
Jin, X.3
Plana, L.A.4
Furber, S.5
-
48
-
-
70449431386
-
Optimal connectivity in hardware-targetted MLP networks
-
Rast, A., Welbourne, S., Jin, X., Furber, S.: Optimal connectivity in hardware-targetted MLP networks. In: Proceedings of 2009 International Joint Conference on Neural Networks (IJCNN2009), pp. 2619-2626 (2009)
-
(2009)
Proceedings of 2009 International Joint Conference on Neural Networks (IJCNN2009)
, pp. 2619-2626
-
-
Rast, A.1
Welbourne, S.2
Jin, X.3
Furber, S.4
-
49
-
-
56349104604
-
Virtual synaptic interconnect using an asynchronous networkon- chip
-
In
-
Rast, A., Yang, S., Khan,M., Furber, S.: Virtual synaptic interconnect using an asynchronous networkon- chip. In: Proceedings of 2008 International Joint Conference on Neural Networks (IJCNN2008) (2008)
-
(2008)
Proceedings of 2008 International Joint Conference on Neural Networks (IJCNN2008)
-
-
Rast, A.1
Yang, S.2
Khan, M.3
Furber, S.4
-
50
-
-
79959418803
-
The leaky integrate-and-fire neuron: A platform for synaptic model exploration on the spinnaker chip
-
Rast, A.D., Galluppi, F., Jin, X., Furber, S.B.: The Leaky Integrate-and-Fire Neuron: A Platform for Synaptic Model Exploration on the SpiNNaker Chip. In: Proceedings of 2010 International Joint Conference Neural Networks (IJCNN2010), pp. 3959-3966 (2010)
-
(2010)
Proceedings of 2010 International Joint Conference Neural Networks (IJCNN2010)
, pp. 3959-3966
-
-
Rast, A.D.1
Galluppi, F.2
Jin, X.3
Furber, S.B.4
-
51
-
-
77954476030
-
Scalable event-driven native parallel processing: The SpiNNaker neuromimetic System
-
Rast, A.D., Jin, X., Galluppi, F., Plana, L.A., Patterson, C., Furber, S.B.: Scalable event-driven native parallel processing: the SpiNNaker neuromimetic System. In: Proceedings of 2010 ACM Conference on Computing Frontiers (CF'10), pp. 20-29 (2010)
-
(2010)
Proceedings of 2010 ACM Conference on Computing Frontiers (CF'10)
, pp. 20-29
-
-
Rast, A.D.1
Jin, X.2
Galluppi, F.3
Plana, L.A.4
Patterson, C.5
Furber, S.B.6
-
52
-
-
56749179074
-
A preliminary investigation of a neocortex model implementation on the cray XD1
-
Rice, K.L., Vutsinas, C.N., Taha, T.M.: A preliminary investigation of a neocortex model implementation on the cray XD1. In: Proceedings of 2007ACM/IEEE InternationalConference on Supercomputing (SC'07), pp. 1-8 (2007)
-
(2007)
Proceedings of 2007ACM/IEEE InternationalConference on Supercomputing (SC'07)
, pp. 1-8
-
-
Rice, K.L.1
Vutsinas, C.N.2
Taha, T.M.3
-
53
-
-
33747045377
-
Event-driven simulation scheme for spiking neural networks using lookup tables to characterize neuronal activity
-
Ros, E., Carrillo, R., Ortigosa, E.M.: Event-driven simulation scheme for spiking neural networks using lookup tables to characterize neuronal activity. Neural Comput. 18(12), 2959-2993 (2006)
-
(2006)
Neural Comput
, vol.18
, Issue.12
, pp. 2959-2993
-
-
Ros, E.1
Carrillo, R.2
Ortigosa, E.M.3
-
55
-
-
33947399325
-
Using GPUs for machine learning algorithms
-
Steinkraus, D., Buck, I., Simard, P.Y.: Using GPUs for machine learning algorithms. In: Proceedings 8th International Conference on Document Analysis and Recognition, pp. 1115-1120 (2005)
-
(2005)
Proceedings 8th International Conference on Document Analysis and Recognition
, pp. 1115-1120
-
-
Steinkraus, D.1
Buck, I.2
Simard, P.Y.3
-
56
-
-
18144426404
-
An FPGA platform for on-line topology exploration of spiking neural networks
-
Upegui, A., Peña-Reyes, C.A., Sanchez, E.: An FPGA platform for on-line topology exploration of spiking neural networks. Microprocess. Microsyst. 29(5), 211-223 (2005)
-
(2005)
Microprocess. Microsyst.
, vol.29
, Issue.5
, pp. 211-223
-
-
Upegui, A.1
Pena-Reyes, C.A.2
Sanchez, E.3
-
57
-
-
33846098196
-
Dynamically reconfigurable silicon array of spiking neurons with conductance-based synapses
-
Vogelstein, R.J., Mallik, U., Vogelstein, J.T., Cauwenberghs, G.: Dynamically reconfigurable silicon array of spiking neurons with conductance-based synapses. IEEE Trans. Neural Netw. 18(1), 253- 265 (2007)
-
(2007)
IEEE Trans. Neural Netw.
, vol.18
, Issue.1
, pp. 253-265
-
-
Vogelstein, R.J.1
Mallik, U.2
Vogelstein, J.T.3
Cauwenberghs, G.4
-
58
-
-
0037907084
-
Event-driven simulation of networks of spiking neurons
-
Morgan Kaufmann Publishers, Waltham
-
Watts, L.: Event-driven simulation of networks of spiking neurons. In: Advances in Neural Information Processing (NIPS) 6, pp. 927-934. Morgan Kaufmann Publishers, Waltham (1994)
-
(1994)
Advances in Neural Information Processing (NIPS)
, vol.6
, pp. 927-934
-
-
Watts, L.1
-
59
-
-
0025564430
-
Design, Fabrication and Evaluation of a 5-inch Wafer Scale Neural Network LSI Composed of 576 Digital Neurons
-
Yasunaga, M., Masuda, N., Yagyu, M., Asai, M., Yamada, M., Masaki, A.: Design, Fabrication and Evaluation of a 5-inch Wafer Scale Neural Network LSI Composed of 576 Digital Neurons. In: Proceedings of 1990 International Joint Conference Neural Networks (IJCNN1990), pp. 527-535 (1990)
-
(1990)
Proceedings of 1990 International Joint Conference Neural Networks (IJCNN1990)
, pp. 527-535
-
-
Yasunaga, M.1
Masuda, N.2
Yagyu, M.3
Asai, M.4
Yamada, M.5
Masaki, A.6
-
60
-
-
77952918913
-
Analog VLSI biophysical neurons and synapses with programmable membrane channel kinetics
-
Yu, T., Cauwenberghs, G.: Analog VLSI biophysical neurons and synapses with programmable membrane channel kinetics. IEEE Trans. Biomed. Circuits Syst. 4(3), 139-148 (2010)
-
(2010)
IEEE Trans. Biomed. Circuits Syst.
, vol.4
, Issue.3
, pp. 139-148
-
-
Yu, T.1
Cauwenberghs, G.2
|