A preliminary investigation of a neocortex model implementation on the Cray XD1

Proceedings of the 2007 ACM/IEEE Conference on Supercomputing, SC'07

Volumn , Issue , 2007, Pages

  Rice, Kenneth L ^a   Vutsinas, Christopher N ^a   Taha, Tarek M ^a  

^a Clemson University   (United States)

Author keywords

Application performance; Cognitive algorithms; FPGA; Reconfigurable

Indexed keywords

APPLICATIONS; COMPUTERS; FIELD PROGRAMMABLE GATE ARRAYS (FPGA); IMAGE RECOGNITION;

APPLICATION PERFORMANCE; COGNITIVE ALGORITHMS; COGNITIVE PROCESSING; FPGA; GENERAL PURPOSE PROCESSORS; MODEL IMPLEMENTATIONS; NEW CLASSES; PERFORMANCE POTENTIALS; RECONFIGURABLE; RECONFIGURABLE LOGICS; SPEED-UP; VISUAL CORTEX MODELS;

SOFTWARE DESIGN;

EID: 56749179074     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1145/1362622.1362626     Document Type: Conference Paper

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