O(mn) time algorithm for optimal buffer insertion of nets with m sinks

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems

Volumn 31, Issue 3, 2012, Pages 437-441

  Li, Zhuo ^a   Zhou, Ying ^a   Shi, Weiping ^b  

^a IBM AUSTIN RESEARCH LABORATORY   (United States)

^b Department of Electrical and Computer Engineering   (United States)

Author keywords

Buffer insertion; data structure; Elmore delay; interconnect; routing

Indexed keywords

BUFFER INSERTION; COST MINIMIZATION; ELMORE DELAY; INDUSTRIAL TEST CASE; INTERCONNECT; INTERCONNECT DELAY; ROUTING; TIME ALGORITHMS;

BUFFER CIRCUITS; DATA STRUCTURES; DESIGN; OPTIMIZATION;

ALGORITHMS;

EID: 84863134777     PISSN: 02780070     EISSN: None     Source Type: Journal    
DOI: 10.1109/TCAD.2011.2174639     Document Type: Article

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